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SubjectRe: [PATCH v3 0/6] Add support for Xilinx Versal SDHCI in Arasan driver
On Mon, 6 Apr 2020 at 19:43, Manish Narani <manish.narani@xilinx.com> wrote:
>
> This patch series includes:
> -> Document the Xilinx Versal SD controller
> -> Add support for Versal SD Tap Delays
> -> Reorganizing the clock operations handling
> -> Resolve kernel-doc warnings
>
> Changes in v2:
> - Addressed review comments given in v1
> - Changed clock operation handling for better modularity.
> - Changed comments to fix kernel-doc warnings
>
> Changes in v3:
> - Addressed review comments from v2
> - Move platform related structure before doing clock related changes
> - Rename sdhci_arasan_data to avoid confusion with another struct name
>
> Manish Narani (6):
> dt-bindings: mmc: arasan: Document 'xlnx,versal-8.9a' controller
> sdhci: arasan: Add support for Versal Tap Delays
> mmc: sdhci-of-arasan: Rename sdhci_arasan_data to avoid confusion
> mmc: sdhci-of-arasan: Rearrange the platform data structs for
> modularity
> mmc: sdhci-of-arasan: Modify clock operations handling
> mmc: sdhci-of-arasan: Fix kernel-doc warnings
>
> .../devicetree/bindings/mmc/arasan,sdhci.txt | 15 +
> drivers/mmc/host/sdhci-of-arasan.c | 473 +++++++++++++++------
> 2 files changed, 361 insertions(+), 127 deletions(-)
>
> --
> 2.1.1
>

Applied for next, by managing some conflicts for patch4, thanks!

Note that, unless there is a "fix" part of the series, there is no
need to ping during the merge window.

Kind regards
Uffe

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