Messages in this thread | | | From | Reinette Chatre <> | Subject | [PATCH 0/2] x86/resctrl: Support wider MBM counters | Date | Wed, 1 Apr 2020 10:51:00 -0700 |
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Memory Bandwidth Monitoring (MBM) is an Intel Resource Director Technology (RDT) feature that tracks Total and Local bandwidth generated which misses the L3 cache.
The original Memory Bandwidth Monitoring (MBM) architectural definition defines counters of up to 62 bits and the first-generation MBM implementation uses 24 bit counters. Software is required to poll at 1 second or faster to ensure that data is retrieved before a counter rollover occurs more than once under worst conditions.
As system bandwidths scale the software requirement is maintained with the introduction of a per-resource enumerable MBM counter width.
This series adds support for the new enumerable MBM counter width.
Details about the feature can be found in Chapter 9 of the most recent Intel ISE available from https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Reinette Chatre (2): x86/resctrl: Maintain MBM counter width per resource x86/resctrl: Support CPUID enumeration of MBM counter width
arch/x86/include/asm/processor.h | 1 + arch/x86/kernel/cpu/common.c | 5 +++++ arch/x86/kernel/cpu/resctrl/ctrlmondata.c | 8 ++++--- arch/x86/kernel/cpu/resctrl/internal.h | 15 ++++++++++--- arch/x86/kernel/cpu/resctrl/monitor.c | 27 ++++++++++++++++------- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 2 +- 6 files changed, 43 insertions(+), 15 deletions(-)
-- 2.21.0
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