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    Subject[PATCH 4.14 092/148] ARM: dts: omap5: Add bus_dma_limit for L3 bus
    Date
    From: Roger Quadros <rogerq@ti.com>

    commit dfa7ea303f56a3a8b1ed3b91ef35af2da67ca4ee upstream.

    The L3 interconnect's memory map is from 0x0 to
    0xffffffff. Out of this, System memory (SDRAM) can be
    accessed from 0x80000000 to 0xffffffff (2GB)

    OMAP5 does support 4GB of SDRAM but upper 2GB can only be
    accessed by the MPU subsystem.

    Add the dma-ranges property to reflect the physical address limit
    of the L3 bus.

    Cc: stable@kernel.org
    Signed-off-by: Roger Quadros <rogerq@ti.com>
    Signed-off-by: Tony Lindgren <tony@atomide.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/arm/boot/dts/omap5.dtsi | 1 +
    1 file changed, 1 insertion(+)

    --- a/arch/arm/boot/dts/omap5.dtsi
    +++ b/arch/arm/boot/dts/omap5.dtsi
    @@ -131,6 +131,7 @@
    #address-cells = <1>;
    #size-cells = <1>;
    ranges = <0 0 0 0xc0000000>;
    + dma-ranges = <0x80000000 0x0 0x80000000 0x80000000>;
    ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
    reg = <0 0x44000000 0 0x2000>,
    <0 0x44800000 0 0x3000>,

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