lkml.org 
[lkml]   [2020]   [Mar]   [6]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 8/8] arm64: dts: renesas: salvator: add a connection from adv748x codec (HDMI input) to the R-Car SoC
Hi Laurent,

Laurent Pinchart, Fri, Mar 06, 2020 14:16:32 +0100:
> On Thu, Mar 05, 2020 at 03:36:28PM +0100, Alex Riesen wrote:
> > Geert Uytterhoeven, Mon, Mar 02, 2020 17:13:30 +0100:
> > > On Mon, Mar 2, 2020 at 5:09 PM Alex Riesen <alexander.riesen@cetitec.com> wrote:
> > > > Geert Uytterhoeven, Mon, Mar 02, 2020 16:32:32 +0100:
> > > > >
> > > > > The #clock-cells should be in the main video-receiver node.
> > > > > Probably there is more than one clock output, so #clock-cells may be 1?
> > > >
> > > > AFAICS, the device can provide only this one clock line (audio master clock
> > > > for I2S output)... I shall re-check, just in case.
> >
> > And you're right, of course: the audio output formatting module of the ADV748x
> > devices provides a set of clock lines related to the I2S pins: the already
> > discussed master clock, left-right channel clock and the serial clock (bit
> > clock?).
>
> I don't think we need to model the last two clocks through CCF though,
> they're part of the I2S protocol, not clock sources that need to be
> explicitly controlled (or queried).

That's good, because I'm right now having hard time finding out how to
calculate the frequencies!

> > Just to try it out (I'll set #clock-cells to 1), I registered a fixed rate
> > clock in the driver, added a clock provider:
> >
> > adv748x_probe:
> >
> > clk = clk_register_fixed_rate(state->dev,
> > "clk-hdmi-i2s-mclk",
> > NULL /* parent_name */,
> > 0 /* flags */,
> > 12288000 /* rate */);
> > of_clk_add_provider(state->dev->of_node, of_clk_src_simple_get, clk);
> >
> > And removed the audio_clk_c frequency setting. I also replaced the audio_clk_c
> > in the list of input clocks of the R-Car-side sound card with the phandle of
> > the adv7482 main node:
> >
> > salvator-common.dtsi:
> >
> > &i2c4 {
> > status = "okay";
> >
> > adv7482_hdmi_decoder: video-receiver@70 {
> > #clock-cells = <0>; // to be replaced with <1>
> > };
> > };
> >
> > &rcar_sound {
> > clocks = ..., <&adv7482_hdmi_decoder>, ...;
> > };
> >
> > As everything continues to work as before, I assume that at least the clock
> > dependencies were resolved.
>
> This looks good to me.

Ok, I settle on this than.

> > Is there a way to verify that the added input clock is actually used?
> > IOW, if its frequency is actually has been programmed into the ssi4 (R-Car
> > receiving hardware) registers, and not just a left-over from previuos attempts
> > or plain default setting?
> >
> > As the ADV748x devices seem to provide also the clocks for video outputs, will
> > it make any sense to place the clock definition into the port node?
> > Or should all provided clocks be indexed in the main device node?
>
> Those clocks are part of the CSI-2 protocol and also don't need to be
> explicitly controlled. As far as I can tell from a quick check of the
> ADV7482 documentation, only the I2S MCLK is a general-purpose clock that
> needs to be exposed.

Thanks, that's good to know!

Do you know, by chance, which of the snd_soc* callbacks should be used to
implement setting of the MCLK? The one in snd_soc_component_driver or
snd_soc_dai_driver->ops (snd_soc_dai_ops)?

Or how the userspace interface looks like? Or, if there is no userspace
interface for this, how the MCLK is supposed to be set? Through mclk-fs?

Regards,
Alex

\
 
 \ /
  Last update: 2020-03-06 14:43    [W:0.122 / U:5.864 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site