Messages in this thread | | | Date | Tue, 3 Mar 2020 16:36:35 +0100 | From | Oleksij Rempel <> | Subject | Re: [PATCH v1] net: phy: tja11xx: add TJA1102 support |
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On Tue, Mar 03, 2020 at 02:59:36PM +0100, Andrew Lunn wrote: > Hi Oleksij > > > TJA1102 is an dual T1 PHY chip. Both PHYs are separately addressable. > > PHY 0 can be identified by PHY ID. PHY 1 has no PHY ID and can be > > configured in device tree by setting compatible = > > "ethernet-phy-id0180.dc81". > > Why-o-why do silicon vendors make devices with invalid PHY IDs!?!?! > > Did you try avoiding the compatible string. We know PHY 0 will probe > as normal. From its PHY ID we know it is a dual device. Could the > probe of PHY 0 register PHY 1? > > No idea if it will work, but could nxp-tja11xx.c register is fixup for > PHY_ID_TJA1102. That fixup would do something like: > > void tja1102_fixup(struct phy_device *phydev_phy0) > { > struct mii_bus *bus = phydev_phy0->mdio.mii; > struct phy_device *phydev_phy1; > > phydev_phy1 = phy_device_create(bus, phydev_phy0->addr + 1, > PHY_ID_TJA1102, FALSE, NULL); > if (phydev_phy1) > phy_device_register(phydev_phy1); > } > > I think the issue here is, it will deadlock when scanning for fixup > for phydev_phy1. So this basic idea, but maybe hooked in somewhere > else? > > Something like this might also help vsc8584 which is a quad PHY with > some shared registers?
OK, thx! I'll take a look on it. Currently there is not solved issues with controlled power on/reset sequence of this chip. The reset and enable pins will affect both PHYs. So, may be vsc8584 will answer my questions.
Regards, Oleksij -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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