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    Subject[PATCH v3 05/10] x86/fpu/xstate: Define new functions for clearing fpregs and xstates
    Date
    From: Fenghua Yu <fenghua.yu@intel.com>

    Currently, fpu__clear() clears all fpregs and xstates. Once XSAVES
    supervisor states are introduced, supervisor settings (e.g. CET xstates)
    must remain active for signals; It is necessary to have separate functions:

    - Create fpu__clear_user_states(): clear only user settings for signals;
    - Create fpu__clear_all(): clear both user and supervisor settings in
    flush_thread().

    Also modify copy_init_fpstate_to_fpregs() to take a mask from above two
    functions.

    v3:
    - Put common code into a static function fpu__clear(), with a parameter
    clear_user_only.

    v2:
    - Fixed an issue where fpu__clear_user_states() drops supervisor xstates.
    - Revise commit log.

    Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
    Co-developed-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
    Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
    Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
    Reviewed-by: Tony Luck <tony.luck@intel.com>
    ---
    arch/x86/include/asm/fpu/internal.h | 3 +-
    arch/x86/kernel/fpu/core.c | 49 +++++++++++++++++++----------
    arch/x86/kernel/fpu/signal.c | 4 +--
    arch/x86/kernel/process.c | 2 +-
    arch/x86/kernel/signal.c | 2 +-
    5 files changed, 39 insertions(+), 21 deletions(-)

    diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
    index ccb1bb32ad7d..a42fcb4b690d 100644
    --- a/arch/x86/include/asm/fpu/internal.h
    +++ b/arch/x86/include/asm/fpu/internal.h
    @@ -31,7 +31,8 @@ extern void fpu__save(struct fpu *fpu);
    extern int fpu__restore_sig(void __user *buf, int ia32_frame);
    extern void fpu__drop(struct fpu *fpu);
    extern int fpu__copy(struct task_struct *dst, struct task_struct *src);
    -extern void fpu__clear(struct fpu *fpu);
    +extern void fpu__clear_user_states(struct fpu *fpu);
    +extern void fpu__clear_all(struct fpu *fpu);
    extern int fpu__exception_code(struct fpu *fpu, int trap_nr);
    extern int dump_fpu(struct pt_regs *ptregs, struct user_i387_struct *fpstate);

    diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c
    index 12c70840980e..6ba3a8b78bf9 100644
    --- a/arch/x86/kernel/fpu/core.c
    +++ b/arch/x86/kernel/fpu/core.c
    @@ -294,12 +294,10 @@ void fpu__drop(struct fpu *fpu)
    * Clear FPU registers by setting them up from
    * the init fpstate:
    */
    -static inline void copy_init_fpstate_to_fpregs(void)
    +static inline void copy_init_fpstate_to_fpregs(u64 features_mask)
    {
    - fpregs_lock();
    -
    if (use_xsave())
    - copy_kernel_to_xregs(&init_fpstate.xsave, -1);
    + copy_kernel_to_xregs(&init_fpstate.xsave, features_mask);
    else if (static_cpu_has(X86_FEATURE_FXSR))
    copy_kernel_to_fxregs(&init_fpstate.fxsave);
    else
    @@ -307,9 +305,6 @@ static inline void copy_init_fpstate_to_fpregs(void)

    if (boot_cpu_has(X86_FEATURE_OSPKE))
    copy_init_pkru_to_fpregs();
    -
    - fpregs_mark_activate();
    - fpregs_unlock();
    }

    /*
    @@ -318,18 +313,40 @@ static inline void copy_init_fpstate_to_fpregs(void)
    * Called by sys_execve(), by the signal handler code and by various
    * error paths.
    */
    -void fpu__clear(struct fpu *fpu)
    +static void fpu__clear(struct fpu *fpu, int clear_user_only)
    {
    - WARN_ON_FPU(fpu != &current->thread.fpu); /* Almost certainly an anomaly */
    + if (static_cpu_has(X86_FEATURE_FPU)) {
    + fpregs_lock();
    +
    + if (clear_user_only) {
    + if (!fpregs_state_valid(fpu, smp_processor_id()) &&
    + xfeatures_mask_supervisor())
    + copy_kernel_to_xregs(&fpu->state.xsave,
    + xfeatures_mask_supervisor());
    + copy_init_fpstate_to_fpregs(xfeatures_mask_user());
    + } else {
    + copy_init_fpstate_to_fpregs(xfeatures_mask_all);
    + }
    +
    + fpregs_mark_activate();
    + fpregs_unlock();
    + return;
    + } else {
    + fpu__drop(fpu);
    + fpu__initialize(fpu);
    + }
    +}

    - fpu__drop(fpu);
    +void fpu__clear_user_states(struct fpu *fpu)
    +{
    + WARN_ON_FPU(fpu != &current->thread.fpu);
    + fpu__clear(fpu, 1);
    +}

    - /*
    - * Make sure fpstate is cleared and initialized.
    - */
    - fpu__initialize(fpu);
    - if (static_cpu_has(X86_FEATURE_FPU))
    - copy_init_fpstate_to_fpregs();
    +void fpu__clear_all(struct fpu *fpu)
    +{
    + WARN_ON_FPU(fpu != &current->thread.fpu);
    + fpu__clear(fpu, 0);
    }

    /*
    diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c
    index 3df0cfae535f..cd6eafba12da 100644
    --- a/arch/x86/kernel/fpu/signal.c
    +++ b/arch/x86/kernel/fpu/signal.c
    @@ -289,7 +289,7 @@ static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)
    IS_ENABLED(CONFIG_IA32_EMULATION));

    if (!buf) {
    - fpu__clear(fpu);
    + fpu__clear_user_states(fpu);
    return 0;
    }

    @@ -416,7 +416,7 @@ static int __fpu__restore_sig(void __user *buf, void __user *buf_fx, int size)

    err_out:
    if (ret)
    - fpu__clear(fpu);
    + fpu__clear_user_states(fpu);
    return ret;
    }

    diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
    index 3053c85e0e42..87de18c64cf5 100644
    --- a/arch/x86/kernel/process.c
    +++ b/arch/x86/kernel/process.c
    @@ -192,7 +192,7 @@ void flush_thread(void)
    flush_ptrace_hw_breakpoint(tsk);
    memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));

    - fpu__clear(&tsk->thread.fpu);
    + fpu__clear_all(&tsk->thread.fpu);
    }

    void disable_TSC(void)
    diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
    index 8a29573851a3..35f878e9f91d 100644
    --- a/arch/x86/kernel/signal.c
    +++ b/arch/x86/kernel/signal.c
    @@ -761,7 +761,7 @@ handle_signal(struct ksignal *ksig, struct pt_regs *regs)
    /*
    * Ensure the signal handler starts with the new fpu state.
    */
    - fpu__clear(fpu);
    + fpu__clear_user_states(fpu);
    }
    signal_setup_done(failed, ksig, stepping);
    }
    --
    2.21.0
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