Messages in this thread | | | Subject | Re: [RFC PATCH v5 6/9] media: tegra: Add Tegra210 Video input driver | From | Sowjanya Komatineni <> | Date | Tue, 24 Mar 2020 18:08:52 -0700 |
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On 3/24/20 5:34 PM, Dmitry Osipenko wrote: > External email: Use caution opening links or attachments > > > 23.03.2020 20:52, Sowjanya Komatineni пишет: >> +static void tegra_channel_vi_soft_reset(struct tegra_vi_channel *chan) >> +{ >> + /* disable clock gating to enable continuous clock */ >> + tegra_vi_write(chan, TEGRA_VI_CFG_CG_CTRL, 0); >> + /* >> + * Soft reset memory client interface, pixel format logic, sensor >> + * control logic, and a shadow copy logic to bring VI to clean state. >> + */ >> + vi_csi_write(chan, TEGRA_VI_CSI_SW_RESET, 0xf); >> + usleep_range(100, 200); >> + vi_csi_write(chan, TEGRA_VI_CSI_SW_RESET, 0x0); > Is it safe to reset MCCIF without blocking and flushing memory requests > at first? Yes to bring VI to clean state on errors its recommended by HW design team.
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