lkml.org 
[lkml]   [2020]   [Mar]   [23]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRe: [PATCH v3 1/3] iio: adc: at91-sama5d2_adc: fix differential channels in triggered mode
Date
On 02.02.2020 13:02, Jonathan Cameron wrote:
> On Tue, 28 Jan 2020 12:57:39 +0000
> <Eugen.Hristev@microchip.com> wrote:
>
>> From: Eugen Hristev <eugen.hristev@microchip.com>
>>
>> The differential channels require writing the channel offset register (COR).
>> Otherwise they do not work in differential mode.
>> The configuration of COR is missing in triggered mode.
>>
>> Fixes: 5e1a1da0f8c9 ("iio: adc: at91-sama5d2_adc: add hw trigger and buffer support")
>> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
> Applied to the fixes-togreg branch of iio.git. Normally I avoid rebasing that
> branch but I may do so this time given it's currently mid merge window.
>
> The other two patches will have to wait for this one to get upstream of
> my togreg branch which will take a few weeks.
>
> Please give me a poke if I seem to have forgotten about them!
>

Poke !

Eugen

> Thanks,
>
> Jonathan
>
>> ---
>> Changes in v2:
>> - moved to the start of the list
>>
>> drivers/iio/adc/at91-sama5d2_adc.c | 15 +++++++++++++++
>> 1 file changed, 15 insertions(+)
>>
>> diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c
>> index e1850f3..2a6950a 100644
>> --- a/drivers/iio/adc/at91-sama5d2_adc.c
>> +++ b/drivers/iio/adc/at91-sama5d2_adc.c
>> @@ -723,6 +723,7 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
>>
>> for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) {
>> struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit);
>> + u32 cor;
>>
>> if (!chan)
>> continue;
>> @@ -732,6 +733,20 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
>> continue;
>>
>> if (state) {
>> + cor = at91_adc_readl(st, AT91_SAMA5D2_COR);
>> +
>> + if (chan->differential)
>> + cor |= (BIT(chan->channel) |
>> + BIT(chan->channel2)) <<
>> + AT91_SAMA5D2_COR_DIFF_OFFSET;
>> + else
>> + cor &= ~(BIT(chan->channel) <<
>> + AT91_SAMA5D2_COR_DIFF_OFFSET);
>> +
>> + at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
>> + }
>> +
>> + if (state) {
>> at91_adc_writel(st, AT91_SAMA5D2_CHER,
>> BIT(chan->channel));
>> /* enable irq only if not using DMA */
>

\
 
 \ /
  Last update: 2020-03-23 11:43    [W:0.338 / U:0.004 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site