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    SubjectRe: [PATCH v12 1/4] dt-bindings: spi: Add schema for Cadence QSPI Controller driver
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    On 10/03/20 7:22 am, Ramuthevar,Vadivel MuruganX wrote:
    > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
    >
    > Add dt-bindings documentation for Cadence-QSPI controller to support
    > spi based flash memories.
    >
    > Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
    > ---
    > .../devicetree/bindings/mtd/cadence-quadspi.txt | 67 -----------
    > .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 127 +++++++++++++++++++++
    > 2 files changed, 127 insertions(+), 67 deletions(-)
    > delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-quadspi.txt
    > create mode 100644 Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
    >
    [...]

    > +
    > +# subnode's properties
    > +patternProperties:
    > + "^.*@[0-9a-fA-F]+$":
    > + type: object
    > + description:
    > + flash device uses the subnodes below defined properties.
    > +
    > + cdns,read-delay:
    > + $ref: /schemas/types.yaml#/definitions/uint32
    > + description:
    > + Delay in 4 microseconds, read capture logic, in clock cycles.


    Not its not... See the old binding description please:

    -- cdns,read-delay : Delay for read capture logic, in clock cycles

    There is no mention of 4us. Range is 0x0 - 0xF

    > +
    > + cdns,tshsl-ns:
    > + description: |
    > + Delay in 50 nanoseconds, for the length that the master mode chip select
    > + outputs are de-asserted between transactions.

    Again see the description in old binding file:

    cdns,tshsl-ns : Delay in nanoseconds for the length that the master
    mode chip select outputs are de-asserted between
    transactions.

    Need not be 50ns or its multiple

    > +
    > + cdns,tsd2d-ns:
    > + description: |
    > + Delay in 50 nanoseconds, between one chip select being de-activated
    > + and the activation of another.
    > +

    same here

    > + cdns,tchsh-ns:
    > + description: |
    > + Delay in 4 nanoseconds, between last bit of current transaction and
    > + deasserting the device chip select (qspi_n_ss_out).
    > +

    Same here... Need not be 4ns...

    > + cdns,tslch-ns:
    > + description: |
    > + Delay in 4 nanoseconds, between setting qspi_n_ss_out low and
    > + first bit transfer.


    Same here...

    Above four values ( cdns,*-ns) come directly from the flash datasheets.

    These values are converted appropriate number of cycles depending upon
    the QSPI ref_clk frequency. So, there is no easy way to express the
    constraint (or range) in DT schema. I would recommend to just stick with
    the description that is there in the old binding file without any
    modifications.

    Regards
    Vignesh

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