Messages in this thread Patch in this message | | | From | Lu Baolu <> | Subject | [PATCH 4/5] iommu/vt-d: Refactor prq_event_thread() | Date | Tue, 17 Mar 2020 15:02:28 +0800 |
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Move the software processing page request descriptors part from prq_event_thread() into a separated function. No any functional changes.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> --- drivers/iommu/intel-svm.c | 43 +++++++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 17 deletions(-)
diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index 6183016f4269..6ce96dd541a6 100644 --- a/drivers/iommu/intel-svm.c +++ b/drivers/iommu/intel-svm.c @@ -517,27 +517,21 @@ static bool is_canonical_address(u64 addr) return (((saddr << shift) >> shift) == saddr); } -static irqreturn_t prq_event_thread(int irq, void *d) +static int intel_svm_process_prq(struct intel_iommu *iommu, + struct page_req_dsc *prq, + int head, int tail) { - struct intel_iommu *iommu = d; struct intel_svm *svm = NULL; - int head, tail, handled = 0; - - /* Clear PPR bit before reading head/tail registers, to - * ensure that we get a new interrupt if needed. */ - writel(DMA_PRS_PPR, iommu->reg + DMAR_PRS_REG); + struct intel_svm_dev *sdev; + struct vm_area_struct *vma; + struct page_req_dsc *req; + struct qi_desc resp; + int handled = 0; + vm_fault_t ret; + u64 address; + int result; - tail = dmar_readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK; - head = dmar_readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK; while (head != tail) { - struct intel_svm_dev *sdev; - struct vm_area_struct *vma; - struct page_req_dsc *req; - struct qi_desc resp; - int result; - vm_fault_t ret; - u64 address; - handled = 1; req = &iommu->prq[head / sizeof(*req)]; @@ -649,6 +643,21 @@ static irqreturn_t prq_event_thread(int irq, void *d) head = (head + sizeof(*req)) & PRQ_RING_MASK; } + return handled; +} + +static irqreturn_t prq_event_thread(int irq, void *d) +{ + struct intel_iommu *iommu = d; + int head, tail, handled; + + /* Clear PPR bit before reading head/tail registers, to + * ensure that we get a new interrupt if needed. */ + writel(DMA_PRS_PPR, iommu->reg + DMAR_PRS_REG); + + tail = dmar_readq(iommu->reg + DMAR_PQT_REG) & PRQ_RING_MASK; + head = dmar_readq(iommu->reg + DMAR_PQH_REG) & PRQ_RING_MASK; + handled = intel_svm_process_prq(iommu, iommu->prq, head, tail); dmar_writeq(iommu->reg + DMAR_PQH_REG, tail); return IRQ_RETVAL(handled); -- 2.17.1
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