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Subject[PATCH 08/16] soundwire: cadence: merge routines to clear/set bits
Date
Use a single loop to wait for hardware to set/clear fields.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
drivers/soundwire/cadence_master.c | 28 ++++++++--------------------
1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/drivers/soundwire/cadence_master.c b/drivers/soundwire/cadence_master.c
index a4ba57f44c1f..22ff66d38a4a 100644
--- a/drivers/soundwire/cadence_master.c
+++ b/drivers/soundwire/cadence_master.c
@@ -211,26 +211,6 @@ static inline void cdns_updatel(struct sdw_cdns *cdns,
cdns_writel(cdns, offset, tmp);
}

-static int cdns_clear_bit(struct sdw_cdns *cdns, int offset, u32 value)
-{
- int timeout = 10;
- u32 reg_read;
-
- writel(value, cdns->registers + offset);
-
- /* Wait for bit to be self cleared */
- do {
- reg_read = readl(cdns->registers + offset);
- if ((reg_read & value) == 0)
- return 0;
-
- timeout--;
- usleep_range(50, 100);
- } while (timeout != 0);
-
- return -EAGAIN;
-}
-
static int cdns_set_wait(struct sdw_cdns *cdns, int offset, u32 mask, u32 value)
{
int timeout = 10;
@@ -249,6 +229,14 @@ static int cdns_set_wait(struct sdw_cdns *cdns, int offset, u32 mask, u32 value)
return -ETIMEDOUT;
}

+static int cdns_clear_bit(struct sdw_cdns *cdns, int offset, u32 value)
+{
+ writel(value, cdns->registers + offset);
+
+ /* Wait for bit to be self cleared */
+ return cdns_set_wait(cdns, offset, value, 0);
+}
+
/*
* all changes to the MCP_CONFIG, MCP_CONTROL, MCP_CMDCTRL and MCP_PHYCTRL
* need to be confirmed with a write to MCP_CONFIG_UPDATE
--
2.20.1
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