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SubjectRe: [PATCH] irqchip/gic-v3: Workaround Cavium erratum 38539 when reading GICD_TYPER2
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On Wed, 2020-03-11 at 11:56 +0000, Marc Zyngier wrote:
> Despite the architecture spec requiring that reserved registers in the GIC
> distributor memory map are RES0 (and thus are not allowed to generate
> an exception), the Cavium ThunderX (aka TX1) SoC explodes as such:
>
> [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
> [ 0.000000] GICv3: 128 SPIs implemented
> [ 0.000000] GICv3: 0 Extended SPIs implemented
> [ 0.000000] Internal error: synchronous external abort: 96000210 [#1] SMP
> [ 0.000000] Modules linked in:
> [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.4.0-rc4-00035-g3cf6a3d5725f #7956
> [ 0.000000] Hardware name: cavium,thunder-88xx (DT)
> [ 0.000000] pstate: 60000085 (nZCv daIf -PAN -UAO)
> [ 0.000000] pc : __raw_readl+0x0/0x8
> [ 0.000000] lr : gic_init_bases+0x110/0x560
> [ 0.000000] sp : ffff800011243d90
> [ 0.000000] x29: ffff800011243d90 x28: 0000000000000000
> [ 0.000000] x27: 0000000000000018 x26: 0000000000000002
> [ 0.000000] x25: ffff8000116f0000 x24: ffff000fbe6a2c80
> [ 0.000000] x23: 0000000000000000 x22: ffff010fdc322b68
> [ 0.000000] x21: ffff800010a7a208 x20: 00000000009b0404
> [ 0.000000] x19: ffff80001124dad0 x18: 0000000000000010
> [ 0.000000] x17: 000000004d8d492b x16: 00000000f67eb9af
> [ 0.000000] x15: ffffffffffffffff x14: ffff800011249908
> [ 0.000000] x13: ffff800091243ae7 x12: ffff800011243af4
> [ 0.000000] x11: ffff80001126e000 x10: ffff800011243a70
> [ 0.000000] x9 : 00000000ffffffd0 x8 : ffff80001069c828
> [ 0.000000] x7 : 0000000000000059 x6 : ffff8000113fb4d1
> [ 0.000000] x5 : 0000000000000001 x4 : 0000000000000000
> [ 0.000000] x3 : 0000000000000000 x2 : 0000000000000000
> [ 0.000000] x1 : 0000000000000000 x0 : ffff8000116f000c
> [ 0.000000] Call trace:
> [ 0.000000] __raw_readl+0x0/0x8
> [ 0.000000] gic_of_init+0x188/0x224
> [ 0.000000] of_irq_init+0x200/0x3cc
> [ 0.000000] irqchip_init+0x1c/0x40
> [ 0.000000] init_IRQ+0x160/0x1d0
> [ 0.000000] start_kernel+0x2ec/0x4b8
> [ 0.000000] Code: a8c47bfd d65f03c0 d538d080 d65f03c0 (b9400000)
>
> when reading the GICv4.1 GICD_TYPER2 register, which is unexpected...
>
> Work around it by adding a new quirk for the following variants:
>
> ThunderX: CN88xx
> OCTEON TX: CN83xx, CN81xx
> OCTEON TX2: CN93xx, CN96xx, CN98xx, CNF95xx*
>
> and use this flag to avoid accessing GICD_TYPER2. Note that all
> reserved registers (including redistributors and ITS) are impacted
> by this erratum, but that only GICD_TYPER2 has to be worked around
> so far.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> Cc: Mark Salter <msalter@redhat.com>
> Cc: Robert Richter <rrichter@marvell.com>
> ---
> This is a respin of [1], with the erratum number and affected
> platform list provided by Robert.
>
> [1] https://lore.kernel.org/lkml/20191027144234.8395-11-maz@kernel.org/

Tested-by: Mark Salter <msalter@redhat.com>


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