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    Subject[PATCH 4.19 01/86] EDAC/amd64: Set grain per DIMM
    Date
    From: Yazen Ghannam <yazen.ghannam@amd.com>

    [ Upstream commit 466503d6b1b33be46ab87c6090f0ade6c6011cbc ]

    The following commit introduced a warning on error reports without a
    non-zero grain value.

    3724ace582d9 ("EDAC/mc: Fix grain_bits calculation")

    The amd64_edac_mod module does not provide a value, so the warning will
    be given on the first reported memory error.

    Set the grain per DIMM to cacheline size (64 bytes). This is the current
    recommendation.

    Fixes: 3724ace582d9 ("EDAC/mc: Fix grain_bits calculation")
    Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
    Signed-off-by: Borislav Petkov <bp@suse.de>
    Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
    Cc: James Morse <james.morse@arm.com>
    Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
    Cc: Robert Richter <rrichter@marvell.com>
    Cc: Tony Luck <tony.luck@intel.com>
    Link: https://lkml.kernel.org/r/20191022203448.13962-7-Yazen.Ghannam@amd.com
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/edac/amd64_edac.c | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
    index 94265e4385146..05d6f9c86ac38 100644
    --- a/drivers/edac/amd64_edac.c
    +++ b/drivers/edac/amd64_edac.c
    @@ -2863,6 +2863,7 @@ static int init_csrows(struct mem_ctl_info *mci)
    dimm = csrow->channels[j]->dimm;
    dimm->mtype = pvt->dram_type;
    dimm->edac_mode = edac_mode;
    + dimm->grain = 64;
    }
    }

    --
    2.20.1


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