| From | Ben Hutchings <> | Date | Sat, 08 Feb 2020 18:21:25 +0000 | Subject | [PATCH 3.16 146/148] mmc: sdhci-s3c: Check if clk_set_rate() succeeds |
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3.16.82-rc1 review patch. If anyone has any objections, please let me know.
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From: Mark Brown <broonie@linaro.org>
commit cd0cfdd2485e6252b3c69284bf09d06c4d303116 upstream.
It is possible that we may fail to set the clock rate, if we do so then log the failure and don't bother reprogramming the IP.
Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Ben Hutchings <ben@decadent.org.uk> --- drivers/mmc/host/sdhci-s3c.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c @@ -300,6 +300,7 @@ static void sdhci_cmu_set_clock(struct s struct device *dev = &ourhost->pdev->dev; unsigned long timeout; u16 clk = 0; + int ret; host->mmc->actual_clock = 0; @@ -311,7 +312,12 @@ static void sdhci_cmu_set_clock(struct s sdhci_s3c_set_clock(host, clock); - clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); + ret = clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock); + if (ret != 0) { + dev_err(dev, "%s: failed to set clock rate %uHz\n", + mmc_hostname(host->mmc), clock); + return; + } clk = SDHCI_CLOCK_INT_EN; sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
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