Messages in this thread | | | Date | Wed, 05 Feb 2020 14:49:40 +0100 (CET) | Subject | Re: [PATCH v3 0/2] TSO bug fixes | From | David Miller <> |
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From: Harini Katakam <harini.katakam@xilinx.com> Date: Wed, 5 Feb 2020 18:08:10 +0530
> An IP errata was recently discovered when testing TSO enabled versions > with perf test tools where a false amba error is reported by the IP. > Some ways to reproduce would be to use iperf or applications with payload > descriptor sizes very close to 16K. Once the error is observed TXERR (or > bit 6 of ISR) will be constantly triggered leading to a series of tx path > error handling and clean up. Workaround the same by limiting this size to > 0x3FC0 as recommended by Cadence. There was no performance impact on 1G > system that I tested with. > > Note on patch 1: The alignment code may be unused but leaving it there > in case anyone is using UFO. > > Added Fixes tag to patch 1.
Series applied and queued up for -stable, thank you.
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