Messages in this thread | | | Subject | Re: [PATCH v4 2/2] dt-bindings: clk: intel: Add bindings document & header file for CGU | From | "Tanwar, Rahul" <> | Date | Wed, 5 Feb 2020 17:10:20 +0800 |
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Hi Stephen,
Thanks for taking time out to review.
On 31/1/2020 10:25 AM, Stephen Boyd wrote: > Quoting Rahul Tanwar (2020-01-30 01:04:03) >> Clock generation unit(CGU) is a clock controller IP of Intel's Lightning >> Mountain(LGM) SoC. Add DT bindings include file and document for CGU clock >> controller driver of LGM. >> >> Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> >> --- >> >> + >> +/* LJPLL4 */ >> +#define LGM_CLK_PCIE 45 >> +#define LGM_CLK_SATA LGM_CLK_PCIE > What is with the aliases?
Aliases are just for code readability when more than one peripherals share the same clock.
Regards, Rahul
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