| Date | Tue, 25 Feb 2020 12:42:34 +0100 | From | Pavel Machek <> | Subject | Re: [PATCH 4.19 184/191] drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_latency |
| |
Hi!
> From: Alex Deucher <alexander.deucher@amd.com> > > [ Upstream commit 4d0a72b66065dd7e274bad6aa450196d42fd8f84 ] > > Only send non-0 clocks to DC for validation. This mirrors > what the windows driver does.
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c > index 1546bc49004f8..3fa6e8123b8eb 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c > @@ -994,12 +994,15 @@ static int smu10_get_clock_by_type_with_latency(struct pp_hwmgr *hwmgr, > > clocks->num_levels = 0; > for (i = 0; i < pclk_vol_table->count; i++) { > - clocks->data[i].clocks_in_khz = pclk_vol_table->entries[i].clk * 10; > - clocks->data[i].latency_in_us = latency_required ? > - smu10_get_mem_latency(hwmgr, > - pclk_vol_table->entries[i].clk) : > - 0; > - clocks->num_levels++; > + if (pclk_vol_table->entries[i].clk) { > + clocks->data[clocks->num_levels].clocks_in_khz = > + pclk_vol_table->entries[i].clk * 10; > + clocks->data[clocks->num_levels].latency_in_us = latency_required ? > + smu10_get_mem_latency(hwmgr, > + pclk_vol_table->entries[i].clk) : > + 0; > + clocks->num_levels++; > + } > }
This results in very ugly wrapping. Better way would be to do "if !(pclk_vol_table->entries[i].clk) continue;"...
"drm/amdgpu/smu10: fix smu10_get_clock_by_type_with_voltage" could be improved in similar way.
Best regards, Pavel
-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany [unhandled content-type:application/pgp-signature] |