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    Subject[PATCH AUTOSEL 5.4 25/50] drm/amd/display: Add initialitions for PLL2 clock source
    Date
    From: Isabel Zhang <isabel.zhang@amd.com>

    [ Upstream commit c134c3cabae46a56ab2e1f5e5fa49405e1758838 ]

    [Why]
    Starting from 14nm, the PLL is built into the PHY and the PLL is mapped
    to PHY on 1 to 1 basis. In the code, the DP port is mapped to a PLL that was not
    initialized. This causes DP to HDMI dongle to not light up the display.

    [How]
    Initializations added for PLL2 when creating resources.

    Signed-off-by: Isabel Zhang <isabel.zhang@amd.com>
    Reviewed-by: Eric Yang <eric.yang2@amd.com>
    Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 6 ++++++
    1 file changed, 6 insertions(+)

    diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
    index b0e5e64df2127..161bf7caf3ae0 100644
    --- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
    +++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
    @@ -57,6 +57,7 @@
    #include "dcn20/dcn20_dccg.h"
    #include "dcn21_hubbub.h"
    #include "dcn10/dcn10_resource.h"
    +#include "dce110/dce110_resource.h"

    #include "dcn20/dcn20_dwb.h"
    #include "dcn20/dcn20_mmhubbub.h"
    @@ -824,6 +825,7 @@ static const struct dc_debug_options debug_defaults_diags = {
    enum dcn20_clk_src_array_id {
    DCN20_CLK_SRC_PLL0,
    DCN20_CLK_SRC_PLL1,
    + DCN20_CLK_SRC_PLL2,
    DCN20_CLK_SRC_TOTAL_DCN21
    };

    @@ -1492,6 +1494,10 @@ static bool construct(
    dcn21_clock_source_create(ctx, ctx->dc_bios,
    CLOCK_SOURCE_COMBO_PHY_PLL1,
    &clk_src_regs[1], false);
    + pool->base.clock_sources[DCN20_CLK_SRC_PLL2] =
    + dcn21_clock_source_create(ctx, ctx->dc_bios,
    + CLOCK_SOURCE_COMBO_PHY_PLL2,
    + &clk_src_regs[2], false);

    pool->base.clk_src_count = DCN20_CLK_SRC_TOTAL_DCN21;

    --
    2.20.1
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