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SubjectRe: [PATCH 2/2] gpio: xilinx: Add irq support to the driver
Hi Srinivas,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on v5.6-rc2]
[also build test ERROR on next-20200219]
[cannot apply to xlnx/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url: https://github.com/0day-ci/linux/commits/Srinivas-Neeli/gpio-xilinx-Add-clock-adaptation-support/20200219-110158
base: 11a48a5a18c63fd7621bb050228cebf13566e4d8
config: i386-randconfig-b003-20200219 (attached as .config)
compiler: gcc-7 (Debian 7.5.0-5) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

ld: drivers/gpio/gpio-xilinx.o: in function `xgpio_irq_setup':
>> drivers/gpio/gpio-xilinx.c:512: undefined reference to `of_irq_to_resource'

vim +512 drivers/gpio/gpio-xilinx.c

499
500 /**
501 * xgpio_irq_setup - Allocate irq for gpio and setup appropriate functions
502 * @np: Device node of the GPIO chip
503 * @chip: Pointer to private gpio channel structure
504 *
505 * Return:
506 * 0 if success, otherwise -1
507 */
508 static int xgpio_irq_setup(struct device_node *np, struct xgpio_instance *chip)
509 {
510 u32 pin_num;
511 struct resource res;
> 512 int ret = of_irq_to_resource(np, 0, &res);
513
514 if (ret <= 0) {
515 pr_info("GPIO IRQ not connected\n");
516 return 0;
517 }
518
519 chip->gc.to_irq = xgpio_to_irq;
520 chip->irq_base = irq_alloc_descs(-1, 0, chip->gc.ngpio, 0);
521 if (chip->irq_base < 0) {
522 pr_err("Couldn't allocate IRQ numbers\n");
523 return -1;
524 }
525 chip->irq_domain = irq_domain_add_legacy(np, chip->gc.ngpio,
526 chip->irq_base, 0,
527 &irq_domain_simple_ops, NULL);
528 /*
529 * set the irq chip, handler and irq chip data for callbacks for
530 * each pin
531 */
532 for (pin_num = 0; pin_num < chip->gc.ngpio; pin_num++) {
533 u32 gpio_irq = irq_find_mapping(chip->irq_domain, pin_num);
534
535 irq_set_lockdep_class(gpio_irq, &gpio_lock_class,
536 &gpio_request_class);
537 pr_debug("IRQ Base: %d, Pin %d = IRQ %d\n",
538 chip->irq_base, pin_num, gpio_irq);
539 irq_set_chip_and_handler(gpio_irq, &xgpio_irqchip,
540 handle_simple_irq);
541 irq_set_chip_data(gpio_irq, (void *)chip);
542 }
543 irq_set_handler_data(res.start, (void *)chip);
544 irq_set_chained_handler(res.start, xgpio_irqhandler);
545
546 return 0;
547 }
548

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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