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SubjectRe: [PATCH v5 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings.
Hi Yuti,

Thank you for the patch.

On Thu, Feb 13, 2020 at 11:16:51AM +0200, Tomi Valkeinen wrote:
> On 12/02/2020 06:26, Yuti Amonkar wrote:
> > Document the bindings used for the Cadence MHDP DPI/DP bridge in
> > yaml format.
> >
> > Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > ---
> > .../bindings/display/bridge/cdns,mhdp.yaml | 125 ++++++++++++++++++
> > 1 file changed, 125 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> > new file mode 100644
> > index 000000000000..e7f84ed1d2da
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> > @@ -0,0 +1,125 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Cadence MHDP bridge
> > +
> > +maintainers:
> > + - Swapnil Jakhade <sjakhade@cadence.com>
> > + - Yuti Amonkar <yamonkar@cadence.com>
> > +
> > +properties:
> > + compatible:
> > + enum:
> > + - cdns,mhdp8546
> > + - ti,j721e-mhdp8546
> > +
> > + reg:
> > + minItems: 1
> > + maxItems: 2
> > + items:
> > + - description:
> > + Register block of mhdptx apb registers upto PHY mapped area(AUX_CONFIG_P).
>
> "up to". Add space before (.
>
> > + The AUX and PMA registers are mapped to associated phy driver.

I wouldn't mention driver here, as that's a software concept unrelated
to DT bindings. You could write "The AUX and PMA registers are not part
of this range, they are instead included in the associated PHY.".

> > + - description:
> > + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
> > +
> > + reg-names:
> > + minItems: 1
> > + maxItems: 2
> > + items:
> > + - const: mhdptx
> > + - const: j721e-intg
> > +
> > + clocks:
> > + maxItems: 1
> > + description:
> > + DP bridge clock, it's used by the IP to know how to translate a number of

s/it's //

> > + clock cycles into a time (which is used to comply with DP standard timings
> > + and delays).
> > +
> > + phys:
> > + description: Phandle to the DisplyPort phy.
>
> "Display"

And s/Phandle/phandle/, and s/phy/PHY/.

Shouldn't this bridge also have port nodes ?

--
Regards,

Laurent Pinchart

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