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    Subject[PATCH AUTOSEL 5.5 257/542] clk: qcom: Add missing msm8998 gcc_bimc_gfx_clk
    Date
    From: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>

    [ Upstream commit db2c7c0a04b11753f5741d00b784b5380ddeee72 ]

    gcc_bimc_gfx_clk is a required clock for booting the GPU and GPU SMMU.

    Fixes: 4807c71cc688 (arm64: dts: Add msm8998 SoC and MTP board support)
    Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
    Link: https://lkml.kernel.org/r/20191217164913.4783-1-jeffrey.l.hugo@gmail.com
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/clk/qcom/gcc-msm8998.c | 14 ++++++++++++++
    include/dt-bindings/clock/qcom,gcc-msm8998.h | 1 +
    2 files changed, 15 insertions(+)

    diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c
    index cf31b5d03270f..df1d7056436cd 100644
    --- a/drivers/clk/qcom/gcc-msm8998.c
    +++ b/drivers/clk/qcom/gcc-msm8998.c
    @@ -1996,6 +1996,19 @@ static struct clk_branch gcc_gp3_clk = {
    },
    };

    +static struct clk_branch gcc_bimc_gfx_clk = {
    + .halt_reg = 0x46040,
    + .halt_check = BRANCH_HALT,
    + .clkr = {
    + .enable_reg = 0x46040,
    + .enable_mask = BIT(0),
    + .hw.init = &(struct clk_init_data){
    + .name = "gcc_bimc_gfx_clk",
    + .ops = &clk_branch2_ops,
    + },
    + },
    +};
    +
    static struct clk_branch gcc_gpu_bimc_gfx_clk = {
    .halt_reg = 0x71010,
    .halt_check = BRANCH_HALT,
    @@ -2810,6 +2823,7 @@ static struct clk_regmap *gcc_msm8998_clocks[] = {
    [GCC_GP1_CLK] = &gcc_gp1_clk.clkr,
    [GCC_GP2_CLK] = &gcc_gp2_clk.clkr,
    [GCC_GP3_CLK] = &gcc_gp3_clk.clkr,
    + [GCC_BIMC_GFX_CLK] = &gcc_bimc_gfx_clk.clkr,
    [GCC_GPU_BIMC_GFX_CLK] = &gcc_gpu_bimc_gfx_clk.clkr,
    [GCC_GPU_BIMC_GFX_SRC_CLK] = &gcc_gpu_bimc_gfx_src_clk.clkr,
    [GCC_GPU_CFG_AHB_CLK] = &gcc_gpu_cfg_ahb_clk.clkr,
    diff --git a/include/dt-bindings/clock/qcom,gcc-msm8998.h b/include/dt-bindings/clock/qcom,gcc-msm8998.h
    index de1d8a1f59665..63e02dc32a0bb 100644
    --- a/include/dt-bindings/clock/qcom,gcc-msm8998.h
    +++ b/include/dt-bindings/clock/qcom,gcc-msm8998.h
    @@ -182,6 +182,7 @@
    #define GCC_MSS_GPLL0_DIV_CLK_SRC 173
    #define GCC_MSS_SNOC_AXI_CLK 174
    #define GCC_MSS_MNOC_BIMC_AXI_CLK 175
    +#define GCC_BIMC_GFX_CLK 176

    #define PCIE_0_GDSC 0
    #define UFS_GDSC 1
    --
    2.20.1
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