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SubjectRe: [PATCH V4 0/4] clk: imx: imx8m: introduce imx8m_clk_hw_composite_core
On Tue, Jan 28, 2020 at 05:28:32AM +0000, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> V4:
> Per Leonard's comments, added new definitions and _SRC/CG/DIV are
> alias to the new definition.
> Did boot test on i.MX8MQ/M/N-EVK
>
> V3:
> Add CLK_SET_RATE_NO_REPARENT and CLK_OPS_PARENT_ENABLE for core
> Avoid break DT for i.MX8MQ
>
> V2:
> Rename imx8m_clk_hw_core_composite to imx8m_clk_hw_composite_core
> Add Abel's tag
>
> To i.MX8M family, there are different types of clock slices,
> bus/core/ip and etc. Currently, the imx8m_clk_hw_composite
> api could only handle bus and ip clock slice, it could
> not handle core slice. The difference is core slice not have
> pre divider and the width of post divider is 3 bits.
>
> To simplify code and reuse imx8m_clk_hw_composite, introduce a
> flag IMX_COMPOSITE_CORE to differentiate the slices.
>
> With this new helper, we could simplify i.MX8M SoC clk drivers.
>
>
> Peng Fan (4):
> clk: imx: composite-8m: add imx8m_clk_hw_composite_core
> clk: imx: imx8mq: use imx8m_clk_hw_composite_core
> clk: imx: imx8mm: use imx8m_clk_hw_composite_core
> clk: imx: imx8mn: use imx8m_clk_hw_composite_core

Applied all, thanks.

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