Messages in this thread | | | From | Stefan Asserhall <> | Subject | RE: [PATCH 3/7] microblaze: Define SMP safe bit operations | Date | Thu, 13 Feb 2020 09:01:21 +0000 |
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> On 12. 02. 20 16:53, Peter Zijlstra wrote: > > On Wed, Feb 12, 2020 at 04:42:25PM +0100, Michal Simek wrote: > >> From: Stefan Asserhall <stefan.asserhall@xilinx.com> > >> > >> For SMP based system there is a need to have proper bit operations. > >> Microblaze is using exclusive load and store instructions. > >> > >> Signed-off-by: Stefan Asserhall <stefan.asserhall@xilinx.com> > >> Signed-off-by: Michal Simek <michal.simek@xilinx.com> > > > >> +/* > >> + * clear_bit doesn't imply a memory barrier */ > >> +#define smp_mb__before_clear_bit() smp_mb() > >> +#define smp_mb__after_clear_bit() smp_mb() > > > > These macros no longer exist. > > ok. Easy to remove. > > > > > Also, might I draw your attention to: > > > > include/asm-generic/bitops/atomic.h > > > > This being a ll/sc arch, I'm thinking that if you do your atomic_t > > implementation right, the generic atomic bitop code should be near > > optimal. > > > > Based on my look it looks like that I can replace implementations in this file by > sourcing which will be using atomic operations. > > #include <asm-generic/bitops/atomic.h> > #include <asm-generic/bitops/lock.h> > > Correct? > > Would be good to run any testsuite to prove that all operations works as > expected. Is there any testsuite I can use to confirm it? > > Thanks, > Michal
The comment in the generic bitops.h says "You should recode these in the native assembly language, if at all possible". I don't think using the generic implementation will be as efficient as the current arch specific one.
My recommendation is to stick with the arch specific implementation.
Thanks, Stefan
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