lkml.org 
[lkml]   [2020]   [Feb]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 03/62] x86/cpufeatures: Add SEV-ES CPU feature
    Date
    From: Tom Lendacky <thomas.lendacky@amd.com>

    Add CPU feature detection for Secure Encrypted Virtualization with
    Encrypted State. This feature enhances SEV by also encrypting the
    guest register state, making it in-accessible to the hypervisor.

    Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
    Signed-off-by: Joerg Roedel <jroedel@suse.de>
    ---
    arch/x86/include/asm/cpufeatures.h | 1 +
    arch/x86/kernel/cpu/amd.c | 4 +++-
    arch/x86/kernel/cpu/scattered.c | 1 +
    3 files changed, 5 insertions(+), 1 deletion(-)

    diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
    index f3327cb56edf..26e4ee209f7b 100644
    --- a/arch/x86/include/asm/cpufeatures.h
    +++ b/arch/x86/include/asm/cpufeatures.h
    @@ -285,6 +285,7 @@
    #define X86_FEATURE_CQM_MBM_LOCAL (11*32+ 3) /* LLC Local MBM monitoring */
    #define X86_FEATURE_FENCE_SWAPGS_USER (11*32+ 4) /* "" LFENCE in user entry SWAPGS path */
    #define X86_FEATURE_FENCE_SWAPGS_KERNEL (11*32+ 5) /* "" LFENCE in kernel entry SWAPGS path */
    +#define X86_FEATURE_SEV_ES (11*32+ 6) /* AMD Secure Encrypted Virtualization - Encrypted State */

    /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
    #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */
    diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
    index ac83a0fef628..aad2223862ef 100644
    --- a/arch/x86/kernel/cpu/amd.c
    +++ b/arch/x86/kernel/cpu/amd.c
    @@ -580,7 +580,7 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
    * If BIOS has not enabled SME then don't advertise the
    * SME feature (set in scattered.c).
    * For SEV: If BIOS has not enabled SEV then don't advertise the
    - * SEV feature (set in scattered.c).
    + * SEV and SEV_ES feature (set in scattered.c).
    *
    * In all cases, since support for SME and SEV requires long mode,
    * don't advertise the feature under CONFIG_X86_32.
    @@ -611,6 +611,8 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
    setup_clear_cpu_cap(X86_FEATURE_SME);
    clear_sev:
    setup_clear_cpu_cap(X86_FEATURE_SEV);
    + setup_clear_cpu_cap(X86_FEATURE_SEV);
    + setup_clear_cpu_cap(X86_FEATURE_SEV_ES);
    }
    }

    diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
    index 62b137c3c97a..30f354989cf1 100644
    --- a/arch/x86/kernel/cpu/scattered.c
    +++ b/arch/x86/kernel/cpu/scattered.c
    @@ -41,6 +41,7 @@ static const struct cpuid_bit cpuid_bits[] = {
    { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 },
    { X86_FEATURE_SME, CPUID_EAX, 0, 0x8000001f, 0 },
    { X86_FEATURE_SEV, CPUID_EAX, 1, 0x8000001f, 0 },
    + { X86_FEATURE_SEV_ES, CPUID_EAX, 3, 0x8000001f, 0 },
    { 0, 0, 0, 0, 0 }
    };

    --
    2.17.1
    \
     
     \ /
      Last update: 2020-02-11 14:53    [W:4.020 / U:0.100 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site