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SubjectRe: [PATCH 1/7] clk: sunxi-ng: sun8i-de2: Sort structures
On Tue, Feb 11, 2020 at 6:28 AM Jernej Skrabec <jernej.skrabec@siol.net> wrote:
>
> Current structures are not sorted by family first and then
> alphabetically. Let's do that now.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>

I would do this at the end of the patch series for a couple of reasons.
First of all, moving code around before the fixes make the fixes less
likely to directly apply to stable kernels, and second, the H6 clks
and resets lists disappear after all the changes.

ChenYu

> ---
> drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 56 ++++++++++++++--------------
> 1 file changed, 28 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> index d9668493c3f9..a928e0c32222 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
> @@ -51,24 +51,6 @@ static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div", "pll-de", 0x0c, 4, 4,
> static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
> CLK_SET_RATE_PARENT);
>
> -static struct ccu_common *sun50i_h6_de3_clks[] = {
> - &mixer0_clk.common,
> - &mixer1_clk.common,
> - &wb_clk.common,
> -
> - &bus_mixer0_clk.common,
> - &bus_mixer1_clk.common,
> - &bus_wb_clk.common,
> -
> - &mixer0_div_clk.common,
> - &mixer1_div_clk.common,
> - &wb_div_clk.common,
> -
> - &bus_rot_clk.common,
> - &rot_clk.common,
> - &rot_div_clk.common,
> -};
> -
> static struct ccu_common *sun8i_a83t_de2_clks[] = {
> &mixer0_clk.common,
> &mixer1_clk.common,
> @@ -108,6 +90,24 @@ static struct ccu_common *sun8i_v3s_de2_clks[] = {
> &wb_div_clk.common,
> };
>
> +static struct ccu_common *sun50i_h6_de3_clks[] = {
> + &mixer0_clk.common,
> + &mixer1_clk.common,
> + &wb_clk.common,
> +
> + &bus_mixer0_clk.common,
> + &bus_mixer1_clk.common,
> + &bus_wb_clk.common,
> +
> + &mixer0_div_clk.common,
> + &mixer1_div_clk.common,
> + &wb_div_clk.common,
> +
> + &bus_rot_clk.common,
> + &rot_clk.common,
> + &rot_div_clk.common,
> +};
> +
> static struct clk_hw_onecell_data sun8i_a83t_de2_hw_clks = {
> .hws = {
> [CLK_MIXER0] = &mixer0_clk.common.hw,
> @@ -219,6 +219,16 @@ static const struct sunxi_ccu_desc sun8i_h3_de2_clk_desc = {
> .num_resets = ARRAY_SIZE(sun8i_a83t_de2_resets),
> };
>
> +static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc = {
> + .ccu_clks = sun8i_v3s_de2_clks,
> + .num_ccu_clks = ARRAY_SIZE(sun8i_v3s_de2_clks),
> +
> + .hw_clks = &sun8i_v3s_de2_hw_clks,
> +
> + .resets = sun8i_a83t_de2_resets,
> + .num_resets = ARRAY_SIZE(sun8i_a83t_de2_resets),
> +};
> +
> static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
> .ccu_clks = sun8i_h3_de2_clks,
> .num_ccu_clks = ARRAY_SIZE(sun8i_h3_de2_clks),
> @@ -239,16 +249,6 @@ static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
> .num_resets = ARRAY_SIZE(sun50i_h6_de3_resets),
> };
>
> -static const struct sunxi_ccu_desc sun8i_v3s_de2_clk_desc = {
> - .ccu_clks = sun8i_v3s_de2_clks,
> - .num_ccu_clks = ARRAY_SIZE(sun8i_v3s_de2_clks),
> -
> - .hw_clks = &sun8i_v3s_de2_hw_clks,
> -
> - .resets = sun8i_a83t_de2_resets,
> - .num_resets = ARRAY_SIZE(sun8i_a83t_de2_resets),
> -};
> -
> static int sunxi_de2_clk_probe(struct platform_device *pdev)
> {
> struct resource *res;
> --
> 2.25.0
>

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