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    Subject[PATCH 4.9 156/175] KVM: arm64: Introduce handling of AArch32 TTBCR2 traps
    Date
    From: Marc Zyngier <maz@kernel.org>

    commit ca4e514774930f30b66375a974b5edcbebaf0e7e upstream.

    ARMv8.2 introduced TTBCR2, which shares TCR_EL1 with TTBCR.
    Gracefully handle traps to this register when HCR_EL2.TVM is set.

    Cc: stable@vger.kernel.org
    Reported-by: James Morse <james.morse@arm.com>
    Signed-off-by: Marc Zyngier <maz@kernel.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    arch/arm64/include/asm/kvm_host.h | 1 +
    arch/arm64/kvm/sys_regs.c | 1 +
    2 files changed, 2 insertions(+)

    --- a/arch/arm64/include/asm/kvm_host.h
    +++ b/arch/arm64/include/asm/kvm_host.h
    @@ -161,6 +161,7 @@ enum vcpu_sysreg {
    #define c2_TTBR1 (TTBR1_EL1 * 2) /* Translation Table Base Register 1 */
    #define c2_TTBR1_high (c2_TTBR1 + 1) /* TTBR1 top 32 bits */
    #define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */
    +#define c2_TTBCR2 (c2_TTBCR + 1) /* Translation Table Base Control R. 2 */
    #define c3_DACR (DACR32_EL2 * 2)/* Domain Access Control Register */
    #define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */
    #define c5_IFSR (IFSR32_EL2 * 2)/* Instruction Fault Status Register */
    --- a/arch/arm64/kvm/sys_regs.c
    +++ b/arch/arm64/kvm/sys_regs.c
    @@ -1315,6 +1315,7 @@ static const struct sys_reg_desc cp15_re
    { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, c2_TTBR0 },
    { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, c2_TTBR1 },
    { Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, c2_TTBCR },
    + { Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, c2_TTBCR2 },
    { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, c3_DACR },
    { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR },
    { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, c5_IFSR },

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