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    Subject[PATCH v2 14/14] arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy"
    Date
    Commit 66db854b1f62d ("arm64: dts: ti: k3-j721e-common-proc-board:
    Configure the PCIe instances") and
    commit 02c35dca2b488 ("arm64: dts: ti: k3-j721e: Enable Super-Speed
    support for USB0") added PHY DT nodes with node name as "link"
    However nodes with #phy-cells should be named 'phy' as discussed in [1].
    Re-name subnodes of serdes in J721E to 'phy'.

    [1] -> http://lore.kernel.org/r/20200909203631.GA3026331@bogus
    Fixes: 66db854b1f62d ("arm64: dts: ti: k3-j721e-common-proc-board: Configure the PCIe instances")
    Fixes: 02c35dca2b488 ("arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0")
    Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
    ---
    arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 8 ++++----
    1 file changed, 4 insertions(+), 4 deletions(-)

    diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    index 788126daf91c..13ae0d89caf2 100644
    --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
    @@ -358,7 +358,7 @@
    };

    &serdes3 {
    - serdes3_usb_link: link@0 {
    + serdes3_usb_link: phy@0 {
    reg = <0>;
    cdns,num-lanes = <2>;
    #phy-cells = <0>;
    @@ -685,7 +685,7 @@
    };

    &serdes0 {
    - serdes0_pcie_link: link@0 {
    + serdes0_pcie_link: phy@0 {
    reg = <0>;
    cdns,num-lanes = <1>;
    #phy-cells = <0>;
    @@ -695,7 +695,7 @@
    };

    &serdes1 {
    - serdes1_pcie_link: link@0 {
    + serdes1_pcie_link: phy@0 {
    reg = <0>;
    cdns,num-lanes = <2>;
    #phy-cells = <0>;
    @@ -705,7 +705,7 @@
    };

    &serdes2 {
    - serdes2_pcie_link: link@0 {
    + serdes2_pcie_link: phy@0 {
    reg = <0>;
    cdns,num-lanes = <2>;
    #phy-cells = <0>;
    --
    2.17.1
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