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    Subject[PATCH 2/6] arm64: dts: qcom: sm8250: add audio clock controllers
    Date
    Add audiocc and aoncc clock controller nodes required for audio on RB5.

    Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
    ---
    arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++++++++++++++++++++++
    1 file changed, 22 insertions(+)

    diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    index 3b4e98b13d36..ec5b53b8f656 100644
    --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    @@ -6,6 +6,8 @@
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/qcom,gcc-sm8250.h>
    #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
    +#include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
    +#include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
    #include <dt-bindings/clock/qcom,rpmh.h>
    #include <dt-bindings/interconnect/qcom,osm-l3.h>
    #include <dt-bindings/mailbox/qcom-ipcc.h>
    @@ -2585,6 +2587,26 @@
    <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>;
    };

    + audiocc: clock-controller@3300000 {
    + compatible = "qcom,sm8250-lpass-audiocc";
    + reg = <0 0x03300000 0 0x30000>;
    + #clock-cells = <1>;
    + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
    + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
    + <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
    + clock-names = "core", "audio", "bus";
    + };
    +
    + aoncc: clock-controller@3380000 {
    + compatible = "qcom,sm8250-lpass-aoncc";
    + reg = <0 0x03380000 0 0x40000>;
    + #clock-cells = <1>;
    + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
    + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
    + <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
    + clock-names = "core", "audio", "bus";
    + };
    +
    adsp: remoteproc@17300000 {
    compatible = "qcom,sm8250-adsp-pas";
    reg = <0 0x17300000 0 0x100>;
    --
    2.21.0
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