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    Subject[PATCH 5.4 02/85] drm/i915/gt: Delay execlist processing for tgl
    Date
    From: Chris Wilson <chris@chris-wilson.co.uk>

    commit 9b99e5ba3e5d68039bd6b657e4bbe520a3521f4c upstream.

    When running gem_exec_nop, it floods the system with many requests (with
    the goal of userspace submitting faster than the HW can process a single
    empty batch). This causes the driver to continually resubmit new
    requests onto the end of an active context, a flood of lite-restore
    preemptions. If we time this just right, Tigerlake hangs.

    Inserting a small delay between the processing of CS events and
    submitting the next context, prevents the hang. Naturally it does not
    occur with debugging enabled. The suspicion then is that this is related
    to the issues with the CS event buffer, and inserting an mmio read of
    the CS pointer status appears to be very successful in preventing the
    hang. Other registers, or uncached reads, or plain mb, do not prevent
    the hang, suggesting that register is key -- but that the hang can be
    prevented by a simple udelay, suggests it is just a timing issue like
    that encountered by commit 233c1ae3c83f ("drm/i915/gt: Wait for CSB
    entries on Tigerlake"). Also note that the hang is not prevented by
    applying CTX_DESC_FORCE_RESTORE, or by inserting a delay on the GPU
    between requests.

    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Cc: Bruce Chang <yu.bruce.chang@intel.com>
    Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
    Cc: stable@vger.kernel.org
    Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20201015195023.32346-1-chris@chris-wilson.co.uk
    (cherry picked from commit 6ca7217dffaf1abba91558e67a2efb655ac91405)
    Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/gpu/drm/i915/gt/intel_lrc.c | 3 +++
    1 file changed, 3 insertions(+)

    --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
    +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
    @@ -1574,6 +1574,9 @@ static void process_csb(struct intel_eng
    if (!inject_preempt_hang(execlists))
    ring_set_paused(engine, 0);

    + /* XXX Magic delay for tgl */
    + ENGINE_POSTING_READ(engine, RING_CONTEXT_STATUS_PTR);
    +
    WRITE_ONCE(execlists->pending[0], NULL);
    break;


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