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    Subject[PATCH v1 19/30] media: staging: tegra-vde: Support OPP and SoC core voltage scaling
    Date
    Add initial OPP and SoC core voltage scaling support to the video
    decoder driver. This is required for enabling system-wide DVFS on
    older Tegra SoCs.

    Tested-by: Peter Geis <pgwipeout@gmail.com>
    Tested-by: Nicolas Chauvet <kwizart@gmail.com>
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    ---
    drivers/staging/media/tegra-vde/Kconfig | 1 +
    drivers/staging/media/tegra-vde/vde.c | 127 ++++++++++++++++++++++++
    drivers/staging/media/tegra-vde/vde.h | 1 +
    3 files changed, 129 insertions(+)

    diff --git a/drivers/staging/media/tegra-vde/Kconfig b/drivers/staging/media/tegra-vde/Kconfig
    index 0dc78afd09e0..0ebfe5b07a30 100644
    --- a/drivers/staging/media/tegra-vde/Kconfig
    +++ b/drivers/staging/media/tegra-vde/Kconfig
    @@ -4,6 +4,7 @@ config TEGRA_VDE
    depends on ARCH_TEGRA || COMPILE_TEST
    select DMA_SHARED_BUFFER
    select IOMMU_IOVA
    + select PM_OPP
    select SRAM
    help
    Say Y here to enable support for the NVIDIA Tegra video decoder
    diff --git a/drivers/staging/media/tegra-vde/vde.c b/drivers/staging/media/tegra-vde/vde.c
    index 28845b5bafaf..9ad43a862eef 100644
    --- a/drivers/staging/media/tegra-vde/vde.c
    +++ b/drivers/staging/media/tegra-vde/vde.c
    @@ -15,11 +15,13 @@
    #include <linux/miscdevice.h>
    #include <linux/module.h>
    #include <linux/of_device.h>
    +#include <linux/pm_opp.h>
    #include <linux/pm_runtime.h>
    #include <linux/reset.h>
    #include <linux/slab.h>
    #include <linux/uaccess.h>

    +#include <soc/tegra/fuse.h>
    #include <soc/tegra/pmc.h>

    #include "uapi.h"
    @@ -926,6 +928,9 @@ static __maybe_unused int tegra_vde_runtime_suspend(struct device *dev)

    clk_disable_unprepare(vde->clk);

    + /* remove performance/voltage vote */
    + dev_pm_opp_set_rate(dev, 0);
    +
    return 0;
    }

    @@ -934,6 +939,12 @@ static __maybe_unused int tegra_vde_runtime_resume(struct device *dev)
    struct tegra_vde *vde = dev_get_drvdata(dev);
    int err;

    + err = dev_pm_opp_set_rate(dev, vde->default_clk_rate);
    + if (err) {
    + dev_err(dev, "Failed to set clock rate: %d\n", err);
    + return err;
    + }
    +
    err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_VDEC,
    vde->clk, vde->rst);
    if (err) {
    @@ -944,6 +955,118 @@ static __maybe_unused int tegra_vde_runtime_resume(struct device *dev)
    return 0;
    }

    +static void tegra_vde_deinit_opp_table(void *data)
    +{
    + struct device *dev = data;
    + struct opp_table *opp_table;
    +
    + opp_table = dev_pm_opp_get_opp_table(dev);
    + dev_pm_opp_of_remove_table(dev);
    + dev_pm_opp_put_supported_hw(opp_table);
    + dev_pm_opp_put_regulators(opp_table);
    + dev_pm_opp_put_opp_table(opp_table);
    +}
    +
    +static int devm_tegra_vde_init_opp_table(struct device *dev,
    + struct tegra_vde *vde)
    +{
    + struct opp_table *opp_table, *hw_opp_table;
    + const char *rname = "core";
    + struct dev_pm_opp *opp;
    + unsigned long rate;
    + u32 hw_version;
    + int err;
    +
    + /* voltage scaling is optional */
    + if (device_property_present(dev, "core-supply"))
    + opp_table = dev_pm_opp_set_regulators(dev, &rname, 1);
    + else
    + opp_table = dev_pm_opp_get_opp_table(dev);
    +
    + if (IS_ERR(opp_table))
    + return dev_err_probe(dev, PTR_ERR(opp_table),
    + "Failed to prepare OPP table\n");
    +
    + if (of_machine_is_compatible("nvidia,tegra20"))
    + hw_version = BIT(tegra_sku_info.soc_process_id);
    + else
    + hw_version = BIT(tegra_sku_info.soc_speedo_id);
    +
    + hw_opp_table = dev_pm_opp_set_supported_hw(dev, &hw_version, 1);
    + err = PTR_ERR_OR_ZERO(hw_opp_table);
    + if (err) {
    + dev_err(dev, "Failed to set supported HW: %d\n", err);
    + goto put_table;
    + }
    +
    + /*
    + * OPP table presence is optional and we want the set_rate() of OPP
    + * API to work similarly to clk_set_rate() if table is missing in a
    + * device-tree. The add_table() errors out if OPP is missing in DT.
    + *
    + * Clock rate should be pre-initialized (i.e. it's non-zero) either
    + * by clock driver or by assigned clocks in a device-tree.
    + */
    + if (!device_property_present(dev, "operating-points-v2")) {
    + vde->default_clk_rate = clk_get_rate(vde->clk);
    + goto add_action;
    + }
    +
    + err = dev_pm_opp_of_add_table(dev);
    + if (err) {
    + dev_err(dev, "Failed to add OPP table: %d\n", err);
    + goto put_hw;
    + }
    +
    + /*
    + * If voltage regulator presents, then we could select the fastest
    + * clock rate, but driver doesn't support frequency scaling yet,
    + * hence the top freq OPP may vote for a very high voltage that will
    + * produce lot's of heat. Let's select OPP for the current/default
    + * rate for now.
    + *
    + * Clock rate should be pre-initialized (i.e. it's non-zero) either
    + * by clock driver or by assigned clocks in a device-tree.
    + */
    + rate = clk_get_rate(vde->clk);
    +
    + /* find suitable OPP for the clock rate supportable by SoC */
    + opp = dev_pm_opp_find_freq_ceil(dev, &rate);
    +
    + if (opp == ERR_PTR(-ERANGE))
    + opp = dev_pm_opp_find_freq_floor(dev, &rate);
    +
    + err = PTR_ERR_OR_ZERO(opp);
    + if (err) {
    + dev_err(dev, "failed to get OPP for %ld Hz: %d\n",
    + rate, err);
    + goto remove_table;
    + }
    +
    + dev_pm_opp_put(opp);
    +
    + vde->default_clk_rate = clk_round_rate(vde->clk, rate);
    +
    +add_action:
    + err = devm_add_action(dev, tegra_vde_deinit_opp_table, dev);
    + if (err)
    + goto remove_table;
    +
    + dev_info(dev, "OPP HW ver. 0x%x, clock rate %lu MHz\n",
    + hw_version, vde->default_clk_rate / 1000000);
    +
    + return 0;
    +
    +remove_table:
    + dev_pm_opp_of_remove_table(dev);
    +put_hw:
    + dev_pm_opp_put_supported_hw(opp_table);
    +put_table:
    + dev_pm_opp_put_regulators(opp_table);
    +
    + return err;
    +}
    +
    static int tegra_vde_probe(struct platform_device *pdev)
    {
    struct device *dev = &pdev->dev;
    @@ -1024,6 +1147,10 @@ static int tegra_vde_probe(struct platform_device *pdev)
    return err;
    }

    + err = devm_tegra_vde_init_opp_table(dev, vde);
    + if (err)
    + return dev_err_probe(dev, err, "Failed to initialize OPP\n");
    +
    vde->iram_pool = of_gen_pool_get(dev->of_node, "iram", 0);
    if (!vde->iram_pool) {
    dev_err(dev, "Could not get IRAM pool\n");
    diff --git a/drivers/staging/media/tegra-vde/vde.h b/drivers/staging/media/tegra-vde/vde.h
    index 5561291b0c88..da83c2d6af8b 100644
    --- a/drivers/staging/media/tegra-vde/vde.h
    +++ b/drivers/staging/media/tegra-vde/vde.h
    @@ -48,6 +48,7 @@ struct tegra_vde {
    struct iova_domain iova;
    struct iova *iova_resv_static_addresses;
    struct iova *iova_resv_last_page;
    + unsigned long default_clk_rate;
    dma_addr_t iram_lists_addr;
    u32 *iram;
    };
    --
    2.27.0
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