lkml.org 
[lkml]   [2020]   [Nov]   [26]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    Date
    From
    SubjectRe: [PATCH v3 04/23] arm64: Move MAIR_EL1_SET to asm/memory.h
    On Thu, Nov 26, 2020 at 03:54:02PM +0000, David Brazdil wrote:
    > KVM currently initializes MAIR_EL2 to the value of MAIR_EL1. In
    > preparation for initializing MAIR_EL2 before MAIR_EL1, move the constant
    > into a shared header file. Since it is used for EL1 and EL2, rename to
    > MAIR_ELx_SET.
    >
    > Signed-off-by: David Brazdil <dbrazdil@google.com>
    > ---
    > arch/arm64/include/asm/memory.h | 13 +++++++++++++
    > arch/arm64/mm/proc.S | 15 +--------------
    > 2 files changed, 14 insertions(+), 14 deletions(-)
    >
    > diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
    > index cd61239bae8c..54a22cb5b17b 100644
    > --- a/arch/arm64/include/asm/memory.h
    > +++ b/arch/arm64/include/asm/memory.h
    > @@ -152,6 +152,19 @@
    > #define MT_S2_FWB_NORMAL 6
    > #define MT_S2_FWB_DEVICE_nGnRE 1
    >
    > +/*
    > + * Default MAIR_ELx. MT_NORMAL_TAGGED is initially mapped as Normal memory and
    > + * changed during __cpu_setup to Normal Tagged if the system supports MTE.
    > + */
    > +#define MAIR_ELx_SET \
    > + (MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) | \
    > + MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
    > + MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) | \
    > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
    > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
    > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) | \
    > + MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL_TAGGED))

    Patch 7 initializes MAIR_EL2 with this directly rather than copying it
    from MAIR_EL1, which means that MT_NORMAL_TAGGED will never be tagged
    within the nVHE hyp code.

    Is that expected? I suspect it's worth a comment here (introduced in
    patch 7), just to make that clear.

    Otherwise this looks fine to me.

    Thanks,
    Mark.


    > +
    > #ifdef CONFIG_ARM64_4K_PAGES
    > #define IOREMAP_MAX_ORDER (PUD_SHIFT)
    > #else
    > diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
    > index 23c326a06b2d..e3b9aa372b96 100644
    > --- a/arch/arm64/mm/proc.S
    > +++ b/arch/arm64/mm/proc.S
    > @@ -45,19 +45,6 @@
    > #define TCR_KASAN_FLAGS 0
    > #endif
    >
    > -/*
    > - * Default MAIR_EL1. MT_NORMAL_TAGGED is initially mapped as Normal memory and
    > - * changed during __cpu_setup to Normal Tagged if the system supports MTE.
    > - */
    > -#define MAIR_EL1_SET \
    > - (MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRnE, MT_DEVICE_nGnRnE) | \
    > - MAIR_ATTRIDX(MAIR_ATTR_DEVICE_nGnRE, MT_DEVICE_nGnRE) | \
    > - MAIR_ATTRIDX(MAIR_ATTR_DEVICE_GRE, MT_DEVICE_GRE) | \
    > - MAIR_ATTRIDX(MAIR_ATTR_NORMAL_NC, MT_NORMAL_NC) | \
    > - MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL) | \
    > - MAIR_ATTRIDX(MAIR_ATTR_NORMAL_WT, MT_NORMAL_WT) | \
    > - MAIR_ATTRIDX(MAIR_ATTR_NORMAL, MT_NORMAL_TAGGED))
    > -
    > #ifdef CONFIG_CPU_PM
    > /**
    > * cpu_do_suspend - save CPU registers context
    > @@ -425,7 +412,7 @@ SYM_FUNC_START(__cpu_setup)
    > /*
    > * Memory region attributes
    > */
    > - mov_q x5, MAIR_EL1_SET
    > + mov_q x5, MAIR_ELx_SET
    > #ifdef CONFIG_ARM64_MTE
    > /*
    > * Update MAIR_EL1, GCR_EL1 and TFSR*_EL1 if MTE is supported
    > --
    > 2.29.2.454.gaff20da3a2-goog
    >

    \
     
     \ /
      Last update: 2020-11-26 18:38    [W:3.664 / U:0.016 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site