lkml.org 
[lkml]   [2020]   [Nov]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v5 2/6] dt-bindings: interrupt-controller: Add binding for few Microsemi interrupt controllers
    Date
    Add the Device Tree binding documentation for the Microsemi Jaguar2,
    Luton and Serval interrupt controller that is part of the ICPU. It is
    connected directly to the MIPS core interrupt controller.

    Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
    ---
    .../bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml | 4 ++++
    1 file changed, 4 insertions(+)

    diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
    index be82920f6798..27b798bfe29b 100644
    --- a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
    +++ b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml
    @@ -21,7 +21,11 @@ properties:
    compatible:
    items:
    - enum:
    + - mscc,jaguar2-icpu-intr
    + - mscc,luton-icpu-intr
    - mscc,ocelot-icpu-intr
    + - mscc,serval-icpu-intr
    +

    '#interrupt-cells':
    const: 1
    --
    2.29.2
    \
     
     \ /
      Last update: 2020-11-25 11:33    [W:4.168 / U:0.128 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site