Messages in this thread | | | Subject | Re: [RFC][PATCH v2 00/21] x86/pti: Defer CR3 switch to C code | From | Alexandre Chartre <> | Date | Tue, 17 Nov 2020 20:02:51 +0100 |
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On 11/17/20 7:28 PM, Borislav Petkov wrote: > On Tue, Nov 17, 2020 at 07:12:07PM +0100, Alexandre Chartre wrote: >> Yes. L1TF/MDS allow some inter cpu-thread attacks which are not mitigated at >> the moment. In particular, this allows a guest VM to attack another guest VM >> or the host kernel running on a sibling cpu-thread. Core Scheduling will >> mitigate the guest-to-guest attack but not the guest-to-host attack. > > I see in vmx_vcpu_enter_exit(): > > /* L1D Flush includes CPU buffer clear to mitigate MDS */ > if (static_branch_unlikely(&vmx_l1d_should_flush)) > vmx_l1d_flush(vcpu); > else if (static_branch_unlikely(&mds_user_clear)) > mds_clear_cpu_buffers(); > > Is that not enough?
No. This prevents the guest VM from gathering data from the host kernel on the same cpu-thread. But there's no mitigation for a guest VM running on a cpu-thread attacking another cpu-thread (which can be running another guest VM or the host kernel) from the same cpu-core. You cannot use flush/clear barriers because the two cpu-threads are running in parallel.
alex.
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