lkml.org 
[lkml]   [2020]   [Nov]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH v8 5/7] ARM: dts: exynos: Add interconnect properties to Exynos4412 bus nodes
    On Wed, Nov 04, 2020 at 11:36:55AM +0100, Sylwester Nawrocki wrote:
    > This patch adds the following properties for Exynos4412 interconnect
    > bus nodes:
    > - interconnects: to declare connections between nodes in order to
    > guarantee PM QoS requirements between nodes,
    > - #interconnect-cells: required by the interconnect framework,
    > - samsung,data-clk-ratio: which allows to specify minimum data clock
    > frequency corresponding to requested bandwidth for each bus.
    >
    > Note that #interconnect-cells is always zero and node IDs are not
    > hardcoded anywhere.
    >
    > Signed-off-by: Artur Świgoń <a.swigon@samsung.com>
    > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
    > ---
    > Changes for v8:
    > - none.
    >
    > Changes for v7:
    > - adjusted to the DT property changes: "interconnects" instead
    > of "samsung,interconnect-parent", "samsung,data-clk-ratio"
    > instead of "bus-width".
    >
    > Changes for v6:
    > - added bus-width property in bus_dmc node.
    >
    > Changes for v5:
    > - adjust to renamed exynos,interconnect-parent-node property,
    > - add properties in common exynos4412.dtsi file rather than
    > in Odroid specific odroid4412-odroid-common.dtsi.
    > ---
    > arch/arm/boot/dts/exynos4412.dtsi | 6 ++++++

    Thanks, applied with Chanwoo's tags.

    Best regards,
    Krzysztof

    \
     
     \ /
      Last update: 2020-11-10 19:13    [W:5.918 / U:0.024 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site