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SubjectRe: [RESENDPATCH v15 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
Hi "Ramuthevar,Vadivel,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[also build test WARNING on v5.10-rc1 next-20201030]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Ramuthevar-Vadivel-MuruganX/mtd-rawnand-Add-NAND-controller-support-on-Intel-LGM-SoC/20201026-153225
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 3650b228f83adda7e5ee532e2b90429c03f7b9ec
config: x86_64-randconfig-r023-20201030 (attached as .config)
compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 772aaa602383cf82795572ebcd86b0e660f3579f)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install x86_64 cross compiling tool for clang build
# apt-get install binutils-x86-64-linux-gnu
# https://github.com/0day-ci/linux/commit/8d6004cac3a7ca929c7c0a49a0d02dceaf8fd5d2
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Ramuthevar-Vadivel-MuruganX/mtd-rawnand-Add-NAND-controller-support-on-Intel-LGM-SoC/20201026-153225
git checkout 8d6004cac3a7ca929c7c0a49a0d02dceaf8fd5d2
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/mtd/nand/raw/intel-nand-controller.c:664:7: warning: variable 'mtd' is uninitialized when used here [-Wuninitialized]
if (!mtd->name) {
^~~
drivers/mtd/nand/raw/intel-nand-controller.c:590:22: note: initialize the variable 'mtd' to silence this warning
struct mtd_info *mtd;
^
= NULL
1 warning generated.

vim +/mtd +664 drivers/mtd/nand/raw/intel-nand-controller.c

584
585 static int ebu_nand_probe(struct platform_device *pdev)
586 {
587 struct device *dev = &pdev->dev;
588 struct ebu_nand_controller *ebu_host;
589 struct nand_chip *nand;
590 struct mtd_info *mtd;
591 struct resource *res;
592 char *resname;
593 int ret, i;
594 u32 reg;
595
596 ebu_host = devm_kzalloc(dev, sizeof(*ebu_host), GFP_KERNEL);
597 if (!ebu_host)
598 return -ENOMEM;
599
600 ebu_host->dev = dev;
601 nand_controller_init(&ebu_host->controller);
602
603 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ebunand");
604 ebu_host->ebu = devm_ioremap_resource(&pdev->dev, res);
605 if (IS_ERR(ebu_host->ebu))
606 return PTR_ERR(ebu_host->ebu);
607
608 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hsnand");
609 ebu_host->hsnand = devm_ioremap_resource(&pdev->dev, res);
610 if (IS_ERR(ebu_host->hsnand))
611 return PTR_ERR(ebu_host->hsnand);
612
613 ret = device_property_read_u32(dev, "nand,cs", &reg);
614 if (ret) {
615 dev_err(dev, "failed to get chip select: %d\n", ret);
616 return ret;
617 }
618 ebu_host->cs_num = reg;
619
620 for (i = 0; i < MAX_CS; i++) {
621 resname = devm_kasprintf(dev, GFP_KERNEL, "nand_cs%d", i);
622 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
623 resname);
624 ebu_host->cs[i].chipaddr = devm_ioremap_resource(dev, res);
625 ebu_host->cs[i].nand_pa = res->start;
626 if (IS_ERR(ebu_host->cs[i].chipaddr))
627 return PTR_ERR(ebu_host->cs[i].chipaddr);
628 }
629
630 ebu_host->clk = devm_clk_get(dev, NULL);
631 if (IS_ERR(ebu_host->clk))
632 return dev_err_probe(dev, PTR_ERR(ebu_host->clk),
633 "failed to get clock\n");
634
635 ret = clk_prepare_enable(ebu_host->clk);
636 if (ret) {
637 dev_err(dev, "failed to enable clock: %d\n", ret);
638 return ret;
639 }
640 ebu_host->clk_rate = clk_get_rate(ebu_host->clk);
641
642 ebu_host->dma_tx = dma_request_chan(dev, "tx");
643 if (IS_ERR(ebu_host->dma_tx))
644 return dev_err_probe(dev, PTR_ERR(ebu_host->dma_tx),
645 "failed to request DMA tx chan!.\n");
646
647 ebu_host->dma_rx = dma_request_chan(dev, "rx");
648 if (IS_ERR(ebu_host->dma_rx))
649 return dev_err_probe(dev, PTR_ERR(ebu_host->dma_rx),
650 "failed to request DMA rx chan!.\n");
651
652 for (i = 0; i < MAX_CS; i++) {
653 resname = devm_kasprintf(dev, GFP_KERNEL, "addr_sel%d", i);
654 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
655 resname);
656 if (!res)
657 return -EINVAL;
658 ebu_host->cs[i].addr_sel = res->start;
659 writel(ebu_host->cs[i].addr_sel | EBU_ADDR_MASK(5) |
660 EBU_ADDR_SEL_REGEN, ebu_host->ebu + EBU_ADDR_SEL(i));
661 }
662
663 nand_set_flash_node(&ebu_host->chip, dev->of_node);
> 664 if (!mtd->name) {
665 dev_err(ebu_host->dev, "NAND label property is mandatory\n");
666 return -EINVAL;
667 }
668
669 mtd = nand_to_mtd(&ebu_host->chip);
670 mtd->dev.parent = dev;
671 ebu_host->dev = dev;
672
673 platform_set_drvdata(pdev, ebu_host);
674 nand_set_controller_data(&ebu_host->chip, ebu_host);
675
676 nand = &ebu_host->chip;
677 nand->controller = &ebu_host->controller;
678 nand->controller->ops = &ebu_nand_controller_ops;
679
680 /* Scan to find existence of the device */
681 ret = nand_scan(&ebu_host->chip, 1);
682 if (ret)
683 goto err_cleanup_dma;
684
685 ret = mtd_device_register(mtd, NULL, 0);
686 if (ret)
687 goto err_clean_nand;
688
689 return 0;
690
691 err_clean_nand:
692 nand_cleanup(&ebu_host->chip);
693 err_cleanup_dma:
694 ebu_dma_cleanup(ebu_host);
695 clk_disable_unprepare(ebu_host->clk);
696
697 return ret;
698 }
699

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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