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SubjectRe: [PATCH V9 1/4] perf/core: Add PERF_SAMPLE_DATA_PAGE_SIZE
On Fri, Oct 09, 2020 at 11:53:00AM +0200, Peter Zijlstra wrote:
> On Fri, Oct 09, 2020 at 10:37:51AM +0100, Will Deacon wrote:
> > On Fri, Oct 09, 2020 at 11:09:27AM +0200, Peter Zijlstra wrote:
>
> > > Patch 4 makes it all far worse by exposing it to pretty much everybody.
> > >
> > > Now, I think we can fix at least the user mappings with the below delta,
> > > but if archs are using non-page-table MMU sizes we'll need arch helpers.
> > >
> > > ARM64 is in that last boat.
> > >
> > > Will, can you live with the below, if not, what would you like to do,
> > > make the entire function __weak so that you can override it, or hook
> > > into it somewhere?
> >
> > Hmm, so I don't think we currently have any PMUs that set 'data->addr'
> > on arm64, in which case maybe none of this currently matters for us.
> >
> > However, I must admit that I couldn't figure out exactly what gets exposed
> > to userspace when the backend drivers don't look at the sample_type or
> > do anything with the addr field.
>
> Patch 4:
>
> https://lkml.kernel.org/r/20201001135749.2804-5-kan.liang@linux.intel.com
>
> is the one that exposes this to everybody with perf support. It will
> then report the page-size for the code address (SAMPLE_IP).

I can see there have another potentail customer to use page-size is
Arm SPE, but Arm SPE is hardware trace based sample but not interrupt
based sample. For this case, I think this patch set cannot be
directly applied to the AUX trace data.

Thanks,
Leo

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