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    SubjectRE: [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay AxiDMA
    Date


    > -----Original Message-----
    > From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
    > Sent: 16 October 2020 10:51 PM
    > To: Sia, Jee Heng <jee.heng.sia@intel.com>
    > Cc: andriy.shevchenko@linux.intel.com; dmaengine@vger.kernel.org; linux-
    > kernel@vger.kernel.org; vkoul@kernel.org; Alexey Brodkin
    > <Alexey.Brodkin@synopsys.com>
    > Subject: Re: [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay
    > AxiDMA
    >
    > Hi Sia,
    >
    > Is this patch series available in some public git repo?
    [>>] We do not have public git repo, but the patch series are tested on kernel v5.9
    > I want to test it on our HW with DW AXI DMAC.
    >
    > Thanks.
    > ---
    > Eugeniy Paltsev
    >
    >
    > ________________________________________
    > From: Sia Jee Heng <jee.heng.sia@intel.com>
    > Sent: Monday, October 12, 2020 07:21
    > To: vkoul@kernel.org; Eugeniy Paltsev
    > Cc: andriy.shevchenko@linux.intel.com; dmaengine@vger.kernel.org; linux-
    > kernel@vger.kernel.org
    > Subject: [PATCH 00/15] dmaengine: dw-axi-dmac: support Intel KeemBay
    > AxiDMA
    >
    > The below patch series are to support AxiDMA running on Intel KeemBay SoC.
    > The base driver is dw-axi-dmac but code refactoring is needed, for example:
    > - Support YAML Schemas DT binding.
    > - Replacing Linked List with virtual descriptor management.
    > - Remove unrelated hw desc stuff from dma memory pool.
    > - Manage dma memory pool alloc/destroy based on channel activity.
    > - Support dmaengine device_sync() callback.
    > - Support dmaengine device_config().
    > - Support dmaegnine device_prep_slave_sg().
    > - Support dmaengine device_prep_dma_cyclic().
    > - Support of_dma_controller_register().
    > - Support burst residue granularity.
    > - Support Intel KeemBay AxiDMA registers.
    > - Support Intel KeemBay AxiDMA device handshake.
    > - Support Intel KeemBay AxiDMA BYTE and HALFWORD device operation.
    > - Add constraint to Max segment size.
    >
    > This patch set is to replace the patch series submitted at:
    > https://urldefense.com/v3/__https://lore.kernel.org/dmaengine/1599213094-
    > 30144-1-git-send-email-
    > jee.heng.sia@intel.com/__;!!A4F2R9G_pg!Nemc1rSHID2X4d8pr0LNF0nD9Odrn4
    > 25GRV8MSTPDvPwE6a3iWPeylAJSaxwqXjfPapMO4U$
    >
    > This patch series are tested on Intel KeemBay platform.
    >
    >
    > Sia Jee Heng (15):
    > dt-bindings: dma: Add YAML schemas for dw-axi-dmac
    > dmaengine: dw-axi-dmac: simplify descriptor management
    > dmaengine: dw-axi-dmac: move dma_pool_create() to
    > alloc_chan_resources()
    > dmaengine: dw-axi-dmac: Add device_synchronize() callback
    > dmaengine: dw-axi-dmac: Add device_config operation
    > dmaengine: dw-axi-dmac: Support device_prep_slave_sg
    > dmaegine: dw-axi-dmac: Support device_prep_dma_cyclic()
    > dmaengine: dw-axi-dmac: Support of_dma_controller_register()
    > dmaengine: dw-axi-dmac: Support burst residue granularity
    > dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA support
    > dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA
    > dmaengine: dw-axi-dmac: Add Intel KeemBay DMA register fields
    > dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA handshake
    > dmaengine: dw-axi-dmac: Add Intel KeemBay AxiDMA BYTE and HALFWORD
    > registers
    > dmaengine: dw-axi-dmac: Set constraint to the Max segment size
    >
    > .../bindings/dma/snps,dw-axi-dmac.txt | 39 -
    > .../bindings/dma/snps,dw-axi-dmac.yaml | 149 ++++
    > .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 696 +++++++++++++++---
    > drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 33 +-
    > 4 files changed, 783 insertions(+), 134 deletions(-) delete mode 100644
    > Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
    > create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-
    > dmac.yaml
    >
    > --
    > 2.18.0

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