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SubjectRe: [PATCH v14 11/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT
Date
On 9/30/20 9:57 PM, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> A Soft Reset sequence will return the flash to Power-on-Reset (POR)
> state. It consists of two commands: Soft Reset Enable and Soft Reset.
> Find out if the sequence is supported from BFPT DWORD 16.
>
> Signed-off-by: Pratyush Yadav <p.yadav@ti.com>

Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

> ---
> drivers/mtd/spi-nor/core.h | 1 +
> drivers/mtd/spi-nor/sfdp.c | 4 ++++
> drivers/mtd/spi-nor/sfdp.h | 2 ++
> 3 files changed, 7 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 105a4ddeb309..0a775a7b5606 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -27,6 +27,7 @@ enum spi_nor_option_flags {
> SNOR_F_HAS_4BIT_BP = BIT(12),
> SNOR_F_HAS_SR_BP3_BIT6 = BIT(13),
> SNOR_F_IO_MODE_EN_VOLATILE = BIT(14),
> + SNOR_F_SOFT_RESET = BIT(15),
> };
>
> struct spi_nor_read_command {
> diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
> index 0b5b9ea44cfc..f6d77004fd4e 100644
> --- a/drivers/mtd/spi-nor/sfdp.c
> +++ b/drivers/mtd/spi-nor/sfdp.c
> @@ -608,6 +608,10 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
> break;
> }
>
> + /* Soft Reset support. */
> + if (bfpt.dwords[BFPT_DWORD(16)] & BFPT_DWORD16_SWRST_EN_RST)
> + nor->flags |= SNOR_F_SOFT_RESET;
> +
> /* Stop here if not JESD216 rev C or later. */
> if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
> return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,
> diff --git a/drivers/mtd/spi-nor/sfdp.h b/drivers/mtd/spi-nor/sfdp.h
> index 6d7243067252..89152ae1cf3e 100644
> --- a/drivers/mtd/spi-nor/sfdp.h
> +++ b/drivers/mtd/spi-nor/sfdp.h
> @@ -90,6 +90,8 @@ struct sfdp_bfpt {
> #define BFPT_DWORD15_QER_SR2_BIT1_NO_RD (0x4UL << 20)
> #define BFPT_DWORD15_QER_SR2_BIT1 (0x5UL << 20) /* Spansion */
>
> +#define BFPT_DWORD16_SWRST_EN_RST BIT(12)
> +
> #define BFPT_DWORD18_CMD_EXT_MASK GENMASK(30, 29)
> #define BFPT_DWORD18_CMD_EXT_REP (0x0UL << 29) /* Repeat */
> #define BFPT_DWORD18_CMD_EXT_INV (0x1UL << 29) /* Invert */
> --
> 2.28.0
>

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