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Subject[RFC v5 37/57] objtool: arm64: Decode load acquire/store release
Date
Decode load/store instructions provided by the v8.4 RCPC architecture
extension.

Suggested-by: Raphael Gault <raphael.gault@arm.com>
Signed-off-by: Julien Thierry <jthierry@redhat.com>
---
tools/objtool/arch/arm64/decode.c | 68 +++++++++++++++++++
.../objtool/arch/arm64/include/insn_decode.h | 3 +
2 files changed, 71 insertions(+)

diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c
index 0bbbacd74e48..becc563345dd 100644
--- a/tools/objtool/arch/arm64/decode.c
+++ b/tools/objtool/arch/arm64/decode.c
@@ -835,6 +835,11 @@ static struct aarch64_insn_decoder ld_st_decoder[] = {
.value = 0b000000000000000,
.decode_func = arm_decode_ld_st_exclusive,
},
+ {
+ .mask = 0b001111010000011,
+ .value = 0b000101000000000,
+ .decode_func = arm_decode_ldapr_stlr_unsc_imm,
+ },
{
.mask = 0b001101100000000,
.value = 0b001000000000000,
@@ -2032,3 +2037,66 @@ int arm_decode_ld_st_regs_pac(u32 instr, enum insn_type *type,

return 0;
}
+
+int arm_decode_ldapr_stlr_unsc_imm(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list)
+{
+ u32 imm9 = 0;
+ unsigned char size = 0, opc = 0, rn = 0, rt = 0, decode_field = 0;
+ struct stack_op *op;
+
+ imm9 = (instr >> 12) & ONES(9);
+ size = (instr >> 30) & ONES(2);
+ opc = (instr >> 22) & ONES(2);
+ rn = (instr >> 5) & ONES(5);
+ rt = instr & ONES(5);
+
+ decode_field = (size << 2) | opc;
+ if (decode_field == 0xB ||
+ decode_field == 0xE ||
+ decode_field == 0xF) {
+ return arm_decode_unknown(instr, type, immediate, ops_list);
+ }
+
+ if (!stack_related_reg(rn)) {
+ *type = INSN_OTHER;
+ return 0;
+ }
+ *type = INSN_STACK;
+ *immediate = imm9;
+
+ op = calloc(1, sizeof(*op));
+ list_add_tail(&op->list, ops_list);
+
+ switch (decode_field) {
+ case 1:
+ case 2:
+ case 3:
+ case 5:
+ case 6:
+ case 7:
+ case 9:
+ case 10:
+ case 13:
+ /* load */
+ op->src.type = OP_SRC_REG_INDIRECT;
+ op->src.reg = rn;
+ op->src.offset = SIGN_EXTEND(imm9, 9);
+ op->dest.type = OP_DEST_REG;
+ op->dest.reg = rt;
+ op->dest.offset = 0;
+ break;
+ default:
+ /* store */
+ op->dest.type = OP_SRC_REG_INDIRECT;
+ op->dest.reg = rn;
+ op->dest.offset = SIGN_EXTEND(imm9, 9);
+ op->src.type = OP_SRC_REG;
+ op->src.reg = rt;
+ op->src.offset = 0;
+ break;
+ }
+
+ return 0;
+}
diff --git a/tools/objtool/arch/arm64/include/insn_decode.h b/tools/objtool/arch/arm64/include/insn_decode.h
index d819d2e795a3..1721d9c487d0 100644
--- a/tools/objtool/arch/arm64/include/insn_decode.h
+++ b/tools/objtool/arch/arm64/include/insn_decode.h
@@ -106,6 +106,9 @@ int arm_decode_adv_simd_single(u32 instr, enum insn_type *type,
int arm_decode_adv_simd_single_post(u32 instr, enum insn_type *type,
unsigned long *immediate,
struct list_head *ops_list);
+int arm_decode_ldapr_stlr_unsc_imm(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list);
int arm_decode_ld_st_noalloc_pair_off(u32 instr, enum insn_type *type,
unsigned long *immediate,
struct list_head *ops_list);
--
2.21.0
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