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Subject[PATCH v2 05/19] iommu/mediatek: Put inv_sel_reg in the plat_data for preparing add 0x2c support in mt6779
Date
For mt6779, MMU_INVLDT_SEL register's offset is changed from 0x38 to 0x2c,
so we can put inv_sel_reg in the plat_data to use it.

Signed-off-by: Chao Hao <chao.hao@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 8 ++++++--
drivers/iommu/mtk_iommu.h | 1 +
2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index bffd417f4442..b61785a87764 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -37,6 +37,7 @@
#define REG_MMU_INVLD_START_A 0x024
#define REG_MMU_INVLD_END_A 0x028

+#define REG_MMU_INV_SEL_MT6779 0x02c
#define REG_MMU_INV_SEL 0x038
#define F_INVLD_EN0 BIT(0)
#define F_INVLD_EN1 BIT(1)
@@ -165,7 +166,7 @@ static void mtk_iommu_tlb_flush_all(void *cookie)

for_each_m4u(data) {
writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
- data->base + REG_MMU_INV_SEL);
+ data->base + data->plat_data->inv_sel_reg);
writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE);
wmb(); /* Make sure the tlb flush all done */
}
@@ -182,7 +183,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
for_each_m4u(data) {
spin_lock_irqsave(&data->tlb_lock, flags);
writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
- data->base + REG_MMU_INV_SEL);
+ data->base + data->plat_data->inv_sel_reg);

writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A);
writel_relaxed(iova + size - 1,
@@ -783,6 +784,7 @@ static const struct mtk_iommu_plat_data mt2712_data = {
.has_bclk = true,
.has_vld_pa_rng = true,
.larbid_remap[0] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9},
+ .inv_sel_reg = REG_MMU_INV_SEL,
};

static const struct mtk_iommu_plat_data mt8173_data = {
@@ -791,12 +793,14 @@ static const struct mtk_iommu_plat_data mt8173_data = {
.has_bclk = true,
.reset_axi = true,
.larbid_remap[0] = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */
+ .inv_sel_reg = REG_MMU_INV_SEL,
};

static const struct mtk_iommu_plat_data mt8183_data = {
.m4u_plat = M4U_MT8183,
.reset_axi = true,
.larbid_remap[0] = {0, 4, 5, 6, 7, 2, 3, 1},
+ .inv_sel_reg = REG_MMU_INV_SEL,
};

static const struct of_device_id mtk_iommu_of_ids[] = {
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index c585811a957c..ec3011a50728 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -43,6 +43,7 @@ struct mtk_iommu_plat_data {
bool has_vld_pa_rng;
bool reset_axi;
u32 m4u1_mask;
+ u32 inv_sel_reg;
unsigned char larbid_remap[2][MTK_LARB_NR_MAX];
};

--
2.18.0
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