Messages in this thread | | | From | Krzysztof Kozlowski <> | Date | Fri, 31 Jan 2020 13:47:39 +0100 | Subject | Re: [PATCH 1/3] ARM: exynos_defconfig: Enable SCHED_MC |
| |
On Mon, 27 Jan 2020 at 22:55, <lukasz.luba@arm.com> wrote: > > From: Lukasz Luba <lukasz.luba@arm.com> > > Since the 'capacities-dmips-mhz' are present in the CPU nodes, make use of > this knowledge in smarter decisions during scheduling. > > The values in 'capacities-dmips-mhz' are normilized, this means that i.e. > when CPU0's capacities-dmips-mhz=100 and CPU1's 'capacities-dmips-mhz'=50, > cpu0 is twice fast as CPU1, at the same frequency. The proper hirarchy > in sched_domain topology could exploit the SoC architecture advantages > like big.LITTLE.
I do not quite get how this is related to rationale behind changing defconfig...
> Enabling the SCHED_MC will create two levels in > sched_domain hierarchy, which might be observed in:
This is looks more convincing... but still what is the need? To work with EAS?
> grep . /proc/sys/kernel/sched_domain/cpu*/domain*/{name,flags} > /proc/sys/kernel/sched_domain/cpu0/domain0/name:MC > /proc/sys/kernel/sched_domain/cpu0/domain1/name:DIE > ... > /proc/sys/kernel/sched_domain/cpu0/domain0/flags:575 > /proc/sys/kernel/sched_domain/cpu0/domain1/flags:4223
Not related to defconfig change and not visible after this commit.
Best regards, Krzysztof
> > Signed-off-by: Lukasz Luba <lukasz.luba@arm.com> > --- > arch/arm/configs/exynos_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig > index e7e4bb5ad8d5..1db857056992 100644 > --- a/arch/arm/configs/exynos_defconfig > +++ b/arch/arm/configs/exynos_defconfig > @@ -8,6 +8,7 @@ CONFIG_PERF_EVENTS=y > CONFIG_ARCH_EXYNOS=y > CONFIG_CPU_ICACHE_MISMATCH_WORKAROUND=y > CONFIG_SMP=y > +CONFIG_SCHED_MC=y > CONFIG_BIG_LITTLE=y > CONFIG_NR_CPUS=8 > CONFIG_HIGHMEM=y > -- > 2.17.1 >
| |