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Subject[PATCH 0/6] Introduce ID_PFR2 and other CPU feature changes
This series is primarily motivated from an adhoc list from Mark Rutland
during our ID_ISAR6 discussion [1]. Besides, it also includes a patch
which does macro replacement for various open bits shift encodings in
various CPU ID registers. This series is based on linux-next 20200124.


Is there anything else apart from these changes which can be accommodated
in this series, please do let me know. Thank you.

Cc: Catalin Marinas <>
Cc: Will Deacon <>
Cc: Marc Zyngier <>
Cc: James Morse <>
Cc: Suzuki K Poulose <>
Cc: Mark Rutland <>

Anshuman Khandual (6):
arm64/cpufeature: Introduce ID_PFR2 CPU register
arm64/cpufeature: Add DIT and CSV2 feature bits in ID_PFR0 register
arm64/cpufeature: Add remaining feature bits in ID_MMFR4 register
arm64/cpufeature: Define an explicit ftr_id_isar0[] for ID_ISAR0 register
arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register
arm64/cpufeature: Replace all open bits shift encodings with macros

arch/arm64/include/asm/cpu.h | 1 +
arch/arm64/include/asm/sysreg.h | 51 +++++++++++++++++++
arch/arm64/kernel/cpufeature.c | 87 ++++++++++++++++++++++-----------
arch/arm64/kernel/cpuinfo.c | 1 +
arch/arm64/kvm/sys_regs.c | 2 +-
5 files changed, 112 insertions(+), 30 deletions(-)


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