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    Subject[PATCH 4.19 092/639] pinctrl: sh-pfc: r8a77980: Add missing MOD_SEL0 field
    Date
    From: Geert Uytterhoeven <geert+renesas@glider.be>

    [ Upstream commit b0f77269f6bba385f1f4dce44e7756cf8fbc0176 ]

    The Module Select Register 0 contains 20 (= 5 x 4) reserved bits, and 12
    single-bit fields, but the variable field descriptor lacks a field of 4
    reserved bits.

    Fixes: f59125248a691dfe ("pinctrl: sh-pfc: Add R8A77980 PFC support")
    Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
    Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/pinctrl/sh-pfc/pfc-r8a77980.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c
    index 3f6967331f646..81a710bb8555e 100644
    --- a/drivers/pinctrl/sh-pfc/pfc-r8a77980.c
    +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77980.c
    @@ -2751,7 +2751,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
    #define F_(x, y) x,
    #define FM(x) FN_##x,
    { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
    - 4, 4, 4, 4,
    + 4, 4, 4, 4, 4,
    1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) {
    /* RESERVED 31, 30, 29, 28 */
    0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
    --
    2.20.1


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