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SubjectRe: [PATCH v12 3/4] watchdog: mtk_wdt: mt8183: Add reset controller
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On Thu, 2020-01-16 at 00:18 +0800, Matthias Brugger wrote:
>
> On 15/01/2020 09:58, Yong Liang wrote:
> > From: "yong.liang" <yong.liang@mediatek.com>
> >
> > Add reset controller API in watchdog driver.
> > Besides watchdog, MTK toprgu module alsa provide sub-system (eg, audio,
> > camera, codec and connectivity) software reset functionality.
> >
> > Signed-off-by: yong.liang <yong.liang@mediatek.com>
> > Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
> > Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
> > Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
>
> Acked-by: Matthias Brugger <matthias.bgg@gmail.com>

May I need send a new patch whith this tag?
>
> > ---
> > drivers/watchdog/mtk_wdt.c | 99 +++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 98 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> > index 9c3d0033260d..e88aacb0404d 100644
> > --- a/drivers/watchdog/mtk_wdt.c
> > +++ b/drivers/watchdog/mtk_wdt.c
> > @@ -9,6 +9,8 @@
> > * Based on sunxi_wdt.c
> > */
> >
> > +#include <dt-bindings/reset-controller/mt8183-resets.h>
> > +#include <linux/delay.h>
> > #include <linux/err.h>
> > #include <linux/init.h>
> > #include <linux/io.h>
> > @@ -16,10 +18,11 @@
> > #include <linux/module.h>
> > #include <linux/moduleparam.h>
> > #include <linux/of.h>
> > +#include <linux/of_device.h>
> > #include <linux/platform_device.h>
> > +#include <linux/reset-controller.h>
> > #include <linux/types.h>
> > #include <linux/watchdog.h>
> > -#include <linux/delay.h>
> >
> > #define WDT_MAX_TIMEOUT 31
> > #define WDT_MIN_TIMEOUT 1
> > @@ -44,6 +47,9 @@
> > #define WDT_SWRST 0x14
> > #define WDT_SWRST_KEY 0x1209
> >
> > +#define WDT_SWSYSRST 0x18U
> > +#define WDT_SWSYS_RST_KEY 0x88000000
> > +
> > #define DRV_NAME "mtk-wdt"
> > #define DRV_VERSION "1.0"
> >
> > @@ -53,8 +59,90 @@ static unsigned int timeout;
> > struct mtk_wdt_dev {
> > struct watchdog_device wdt_dev;
> > void __iomem *wdt_base;
> > + spinlock_t lock; /* protects WDT_SWSYSRST reg */
> > + struct reset_controller_dev rcdev;
> > +};
> > +
> > +struct mtk_wdt_data {
> > + int toprgu_sw_rst_num;
> > };
> >
> > +static const struct mtk_wdt_data mt8183_data = {
> > + .toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
> > +};
> > +
> > +static int toprgu_reset_update(struct reset_controller_dev *rcdev,
> > + unsigned long id, bool assert)
> > +{
> > + unsigned int tmp;
> > + unsigned long flags;
> > + struct mtk_wdt_dev *data =
> > + container_of(rcdev, struct mtk_wdt_dev, rcdev);
> > +
> > + spin_lock_irqsave(&data->lock, flags);
> > +
> > + tmp = readl(data->wdt_base + WDT_SWSYSRST);
> > + if (assert)
> > + tmp |= BIT(id);
> > + else
> > + tmp &= ~BIT(id);
> > + tmp |= WDT_SWSYS_RST_KEY;
> > + writel(tmp, data->wdt_base + WDT_SWSYSRST);
> > +
> > + spin_unlock_irqrestore(&data->lock, flags);
> > +
> > + return 0;
> > +}
> > +
> > +static int toprgu_reset_assert(struct reset_controller_dev *rcdev,
> > + unsigned long id)
> > +{
> > + return toprgu_reset_update(rcdev, id, true);
> > +}
> > +
> > +static int toprgu_reset_deassert(struct reset_controller_dev *rcdev,
> > + unsigned long id)
> > +{
> > + return toprgu_reset_update(rcdev, id, false);
> > +}
> > +
> > +static int toprgu_reset(struct reset_controller_dev *rcdev,
> > + unsigned long id)
> > +{
> > + int ret;
> > +
> > + ret = toprgu_reset_assert(rcdev, id);
> > + if (ret)
> > + return ret;
> > +
> > + return toprgu_reset_deassert(rcdev, id);
> > +}
> > +
> > +static const struct reset_control_ops toprgu_reset_ops = {
> > + .assert = toprgu_reset_assert,
> > + .deassert = toprgu_reset_deassert,
> > + .reset = toprgu_reset,
> > +};
> > +
> > +static int toprgu_register_reset_controller(struct platform_device *pdev,
> > + int rst_num)
> > +{
> > + int ret;
> > + struct mtk_wdt_dev *mtk_wdt = platform_get_drvdata(pdev);
> > +
> > + spin_lock_init(&mtk_wdt->lock);
> > +
> > + mtk_wdt->rcdev.owner = THIS_MODULE;
> > + mtk_wdt->rcdev.nr_resets = rst_num;
> > + mtk_wdt->rcdev.ops = &toprgu_reset_ops;
> > + mtk_wdt->rcdev.of_node = pdev->dev.of_node;
> > + ret = devm_reset_controller_register(&pdev->dev, &mtk_wdt->rcdev);
> > + if (ret != 0)
> > + dev_err(&pdev->dev,
> > + "couldn't register wdt reset controller: %d\n", ret);
> > + return ret;
> > +}
> > +
> > static int mtk_wdt_restart(struct watchdog_device *wdt_dev,
> > unsigned long action, void *data)
> > {
> > @@ -155,6 +243,7 @@ static int mtk_wdt_probe(struct platform_device *pdev)
> > {
> > struct device *dev = &pdev->dev;
> > struct mtk_wdt_dev *mtk_wdt;
> > + const struct mtk_wdt_data *wdt_data;
> > int err;
> >
> > mtk_wdt = devm_kzalloc(dev, sizeof(*mtk_wdt), GFP_KERNEL);
> > @@ -190,6 +279,13 @@ static int mtk_wdt_probe(struct platform_device *pdev)
> > dev_info(dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)\n",
> > mtk_wdt->wdt_dev.timeout, nowayout);
> >
> > + wdt_data = of_device_get_match_data(dev);
> > + if (wdt_data) {
> > + err = toprgu_register_reset_controller(pdev,
> > + wdt_data->toprgu_sw_rst_num);
> > + if (err)
> > + return err;
> > + }
> > return 0;
> > }
> >
> > @@ -219,6 +315,7 @@ static int mtk_wdt_resume(struct device *dev)
> >
> > static const struct of_device_id mtk_wdt_dt_ids[] = {
> > { .compatible = "mediatek,mt6589-wdt" },
> > + { .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
> > { /* sentinel */ }
> > };
> > MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);
> >

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