Messages in this thread | | | From | Thomas Gleixner <> | Subject | Re: [PATCH] x86/speculation/spectre_v2: Exclude Zhaoxin CPUs from SPECTRE_V2 | Date | Thu, 16 Jan 2020 18:09:27 +0100 |
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Tony,
Tony W Wang-oc <TonyWWang-oc@zhaoxin.com> writes:
> @@ -1023,6 +1023,7 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) > #define MSBDS_ONLY BIT(5) > #define NO_SWAPGS BIT(6) > #define NO_ITLB_MULTIHIT BIT(7) > +#define NO_SPECTRE_V2 BIT(8) > > #define VULNWL(_vendor, _family, _model, _whitelist) \ > { X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist } > @@ -1084,6 +1085,10 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = { > /* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */ > VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT), > VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT), > + > + /* Zhaoxin Family 7 */ > + VULNWL(CENTAUR, 7, X86_MODEL_ANY, NO_SPECTRE_V2), > + VULNWL(ZHAOXIN, 7, X86_MODEL_ANY, NO_SPECTRE_V2), > {} > }; > > @@ -1116,7 +1121,9 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) > return; > > setup_force_cpu_bug(X86_BUG_SPECTRE_V1); > - setup_force_cpu_bug(X86_BUG_SPECTRE_V2); > + > + if (!cpu_matches(NO_SPECTRE_V2)) > + setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
That's way better. But as you might have noticed yourself this conflicts with the other patch which excludes these machines from the SWAPGS bug.
Granted it's a trivial conflict, but maintainers are not there to mop up the mess others create. So the right thing here is to resend both patches as a patch series with the conflict properly resolved.
Thanks,
tglx
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