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SubjectRE: [PATCH V3 2/3] dt-bindings: pinctrl: Convert i.MX8MM to json-schema
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Hi, Marco

> Subject: Re: [PATCH V3 2/3] dt-bindings: pinctrl: Convert i.MX8MM to json-
> schema
>
> Hi Anson,
>
> On 20-01-15 09:30, Anson Huang wrote:
> > Convert the i.MX8MM pinctrl binding to DT schema format using
> > json-schema
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > Change since V2:
> > - the lisence should be GPL-2.0
> > ---
> > .../bindings/pinctrl/fsl,imx8mm-pinctrl.txt | 36 -----------
> > .../bindings/pinctrl/fsl,imx8mm-pinctrl.yaml | 69
> ++++++++++++++++++++++
> > 2 files changed, 69 insertions(+), 36 deletions(-) delete mode
> > 100644
> > Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt
> > create mode 100644
> > Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt
> > b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt
> > deleted file mode 100644
> > index e4e01c0..0000000
> > --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt
> > +++ /dev/null
> > @@ -1,36 +0,0 @@
> > -* Freescale IMX8MM IOMUX Controller
> > -
> > -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this
> > directory -for common binding part and usage.
> > -
> > -Required properties:
> > -- compatible: "fsl,imx8mm-iomuxc"
> > -- reg: should contain the base physical address and size of the
> > iomuxc
> > - registers.
> > -
> > -Required properties in sub-nodes:
> > -- fsl,pins: each entry consists of 6 integers and represents the mux
> > and config
> > - setting for one pin. The first 5 integers <mux_reg conf_reg
> > input_reg mux_val
> > - input_val> are specified using a PIN_FUNC_ID macro, which can be
> > found in
> > - <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last integer
> > CONFIG is
> > - the pad setting value like pull-up on this pin. Please refer to
> > i.MX8M Mini
> > - Reference Manual for detailed CONFIG settings.
> > -
> > -Examples:
> > -
> > -&uart1 {
> > - pinctrl-names = "default";
> > - pinctrl-0 = <&pinctrl_uart1>;
> > -};
> > -
> > -iomuxc: pinctrl@30330000 {
> > - compatible = "fsl,imx8mm-iomuxc";
> > - reg = <0x0 0x30330000 0x0 0x10000>;
> > -
> > - pinctrl_uart1: uart1grp {
> > - fsl,pins = <
> > - MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
> > - MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
> > - >;
> > - };
> > -};
> > diff --git
> > a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml
> > b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml
> > new file mode 100644
> > index 0000000..8b2de93
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yam
> > +++ l
> > @@ -0,0 +1,69 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +%YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fschemas%2Fpinctrl%2Ffsl%2Cimx8mm-
> pinctrl.yaml%23&amp;dat
> >
> +a=02%7C01%7Canson.huang%40nxp.com%7C5940bd35fa2b432ccd9008d79
> 98b1366%
> >
> +7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63714669491458312
> 4&amp;s
> >
> +data=JqPAVaqc%2BvdH9UDy2EkYEVf9s1IrDzvgLBoyeJgYnnA%3D&amp;rese
> rved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-
> schemas%2Fcore.yaml%23&amp;data=02%7C01%7Canson.hua
> >
> +ng%40nxp.com%7C5940bd35fa2b432ccd9008d7998b1366%7C686ea1d3bc2
> b4c6fa92
> >
> +cd99c5c301635%7C0%7C0%7C637146694914583124&amp;sdata=6oJNpbgK
> %2FhINLR
> > +j%2B6kV8RnwPkfcdugxU3aHLZXLzTto%3D&amp;reserved=0
> > +
> > +title: Freescale IMX8MM IOMUX Controller
> > +
> > +maintainers:
> > + - Anson Huang <Anson.Huang@nxp.com>
> > +
> > +description:
> > + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in
> > +this directory
> > + for common binding part and usage.
> > +
> > +properties:
> > + compatible:
> > + const: fsl,imx8mm-iomuxc
> > +
> > + reg:
> > + maxItems: 1
> > +
> > +# Client device subnode's properties
> > +patternProperties:
> > + 'grp$':
> > + type: object
> > + description:
> > + Pinctrl node's client devices use subnodes for desired pin configuration.
> > + Client device subnodes use below standard properties.
> > +
> > + properties:
> > + fsl,pins:
> > + allOf:
> > + - $ref: /schemas/types.yaml#/definitions/uint32-array
> > + description:
> > + each entry consists of 6 integers and represents the mux and config
> > + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
> > + mux_val input_val> are specified using a PIN_FUNC_ID macro, which
> can
> > + be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>.
> The last
> > + integer CONFIG is the pad setting value like pull-up on this pin.
> Please
> > + refer to i.MX8M Mini Reference Manual for detailed CONFIG settings.
> > +
> > + required:
> > + - fsl,pins
> > +
> > + additionalProperties: false
> > +
> > +required:
> > + - compatible
> > + - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + # Pinmux controller node
> > + - |
> > + iomuxc: pinctrl@30330000 {
> > + compatible = "fsl,imx8mm-iomuxc";
> > + reg = <0x30330000 0x10000>;
> > +
> > + pinctrl_uart2: uart2grp {
> > + fsl,pins = <
> > + 0x23C 0x4A4 0x4FC 0x0 0x0 0x140
>
> Why we can't use the pinctrl defines like
> MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX anymore?

The reason why I put the value NOT macro define here is the header file is put
in arch/arm64/boot/dts/freescale/ folder rather than include/dt-binding/pinctrl/,
so when using macro define, need to include the header file using absolute path
arch/arm64/boot/dts/freescale/, I think it is NOT that good, so I put the value here directly.

Anson.

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