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SubjectRe: [PATCH v2] mmc: sdhci: fix minimum clock rate for v3 controller
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On 15/01/20 10:32 am, Michał Mirosław wrote:
> For SDHCIv3+ with programmable clock mode, minimal clock frequency is
> still base clock / max(divider). Minimal programmable clock frequency is
> always greater than minimal divided clock frequency. Without this patch,
> SDHCI uses out-of-spec initial frequency when multiplier is big enough:
>
> mmc1: mmc_rescan_try_freq: trying to init card at 468750 Hz
> [for 480 MHz source clock divided by 1024]
>
> The code in sdhci_calc_clk() already chooses a correct SDCLK clock source.

source -> mode

>
> Cc: stable@vger.kernel.org
> Fixes: c3ed3877625f ("mmc: sdhci: add support for programmable clock mode")
> Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
> ---
> v2: extend commitmsg and add comment
> ---
> drivers/mmc/host/sdhci.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index 96609c961465..fde510c55c89 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -3903,11 +3903,11 @@ int sdhci_setup_host(struct sdhci_host *host)
> if (host->ops->get_min_clock)
> mmc->f_min = host->ops->get_min_clock(host);
> else if (host->version >= SDHCI_SPEC_300) {
> - if (host->clk_mul) {
> - mmc->f_min = (host->max_clk * host->clk_mul) / 1024;
> + if (host->clk_mul)
> max_clk = host->max_clk * host->clk_mul;
> - } else
> - mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
> + /* minimal divided clock rate is always less than minimal
> + * programmable clock rate */

Comment format and let's use the same terminology as the spec.

/*
* Divided Clock Mode minimum clock rate is always less than
* Programmable Clock Mode minimum clock rate.
*/

> + mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
> } else
> mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200;
>
>

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