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SubjectRe: [PATCH v3 2/5] mtd: rawnand: denali_dt: Add support for configuring SPARE_AREA_SKIP_BYTES
On Fri, 2019-12-20 at 11:31:52 UTC, Masahiro Yamada wrote:
> From: Marek Vasut <>
> The SPARE_AREA_SKIP_BYTES register is reset when the controller reset
> signal is toggled. Yet, this register must be configured to match the
> content of the NAND OOB area. The current default value is always set
> to 8 and is programmed into the hardware in case the hardware was not
> programmed before (e.g. in a bootloader) with a different value. This
> however does not work when the block is reset properly by Linux.
> On Altera SoCFPGA CycloneV, ArriaV and Arria10, which are the SoCFPGA
> platforms which support booting from NAND, the SPARE_AREA_SKIP_BYTES
> value must be set to 2. On Socionext Uniphier, the value is 8. This
> patch adds support for preconfiguring the default value and handles
> the special SoCFPGA case by setting the default to 2 on all SoCFPGA
> platforms, while retaining the original behavior and default value of
> 8 on all the other platforms.
> Signed-off-by: Marek Vasut <>
> Cc: Miquel Raynal <>
> Cc: Richard Weinberger <>
> Cc: Vignesh Raghavendra <>
> To:
> Reviewed-by: Tudor Ambarus <>
> Acked-by: Masahiro Yamada <>

Applied to nand/next, thanks.


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