Messages in this thread | | | Subject | Re: [PATCH] dt-bindings: reset: intel,rcu-gw: Fix intel,global-reset schema | From | Dilip Kota <> | Date | Tue, 14 Jan 2020 18:03:50 +0800 |
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Hi Rob,
My bad, please ignore my response. I just directly jumped into the error and felt you are suggesting me to send a separate patch to fix the error. After sending the mail i realized by reading the subject that you already submitted the fix patch. Please ignore it,
Thanks for doing it. Regards, Dilip
On 1/14/2020 5:54 PM, Dilip Kota wrote: > > On 1/14/2020 5:45 AM, Rob Herring wrote: >> The intel,rcu-gw binding example has an error: >> >> Documentation/devicetree/bindings/reset/intel,rcu-gw.example.dt.yaml: >> reset-controller@e0000000: intel,global-reset: [[16, 30]] is too >> short >> >> The error isn't really correct as the problem is in how the data is >> encoded and the schema is not fixed up by the tooling correctly. >> However, array properties should describe the elements in the array, so >> lets do that which fixes the error in the process. > > Sure, i will add the change describing the array properties and push > as a fix patch. > > > Regards, > > Dilip > >> >> Fixes: b7ab0cb00d08 ("dt-bindings: reset: Add YAML schemas for the >> Intel Reset controller") >> Cc: Philipp Zabel <p.zabel@pengutronix.de> >> Cc: Dilip Kota <eswara.kota@linux.intel.com> >> Signed-off-by: Rob Herring <robh@kernel.org> >> --- >> Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml | 6 +++++- >> 1 file changed, 5 insertions(+), 1 deletion(-) >> >> diff --git >> a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml >> b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml >> index 246dea8a2ec9..8ac437282659 100644 >> --- a/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml >> +++ b/Documentation/devicetree/bindings/reset/intel,rcu-gw.yaml >> @@ -23,7 +23,11 @@ properties: >> description: Global reset register offset and bit offset. >> allOf: >> - $ref: /schemas/types.yaml#/definitions/uint32-array >> - - maxItems: 2 >> + items: >> + - description: Register offset >> + - description: Register bit offset >> + minimum: 0 >> + maximum: 31 >> "#reset-cells": >> minimum: 2
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