lkml.org 
[lkml]   [2020]   [Jan]   [14]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH v4 1/3] dt-bindings: mmc: Document the Amlogic Meson SDHC MMC host controller
Hi Rob,

On Mon, Jan 13, 2020 at 10:10 PM Rob Herring <robh@kernel.org> wrote:
>
> On Sun, Jan 12, 2020 at 01:24:57AM +0100, Martin Blumenstingl wrote:
> > This documents the devicetree bindings for the SDHC MMC host controller
> > found in Meson6, Meson8, Meson8b and Meson8m2 SoCs. It can use a
> > bus-width of 1/4/8-bit and it supports eMMC spec 4.4x/4.5x including
> > HS200 mode (up to 100MHz clock). It embeds an internal clock controller
> > which outputs four clocks (mod_clk, sd_clk, tx_clk and rx_clk) and is
> > fed by four external input clocks (clkin[0-3]). "pclk" is the module
> > register clock, it has to be enabled to access the registers.
> >
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> > ---
> > .../bindings/mmc/amlogic,meson-mx-sdhc.yaml | 83 +++++++++++++++++++
> > .../dt-bindings/clock/meson-mx-sdhc-clkc.h | 8 ++
> > 2 files changed, 91 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml
> > create mode 100644 include/dt-bindings/clock/meson-mx-sdhc-clkc.h
>
> Fails 'make dt_binding_check':
>
> Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.example.dts:17:53:
> warning: extra tokens at end of #include directive
> #include <dt-bindings/clock/meson-mx-sdhc-clkc.yaml>;
> ^
> Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.example.dts:17:10:
> fatal error: dt-bindings/clock/meson-mx-sdhc-clkc.yaml: No such file or directory
> #include <dt-bindings/clock/meson-mx-sdhc-clkc.yaml>;
> ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sorry for that - I'll fix it in v5

[...]
> > + clock-names:
> > + items:
> > + - const: pclk
> > + - const: mod_clk
> > + - const: sd_clk
> > + - const: rx_clk
> > + - const: tx_clk
> > + - const: clkin0
> > + - const: clkin1
> > + - const: clkin2
> > + - const: clkin3
>
> Kind of odd to put the output clocks in the middle of the list.
I'll have to re-send this anyways so I'll put clkin[0-3] at the start
of the list


Martin

\
 
 \ /
  Last update: 2020-01-14 21:12    [W:0.037 / U:72.624 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site